PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 24

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA102-I/SS
Manufacturer:
MICRCOHI
Quantity:
20 000
PIC24FXXKAXXX
4.2
Before
programming executive is stored in the executive
memory and perform the following:
1.
2.
Figure 4-2 illustrates this procedure.
If the programming executive is resident, the
Application
programming can resume as normal. However, if the
Application ID Word is not BBh, the programming
executive must be programmed to executive code
memory using the method described in Section 5.4
“Programming the Programming Executive to
Memory”.
Section 3.0 “Device Programming – ICSP” describes
the ICSP programming method. Section 3.13 “Reading
the Application ID Word” describes the procedure for
reading the Application ID Word in ICSP mode.
FIGURE 4-2:
DS39919A-page 24
Enter In-Circuit Serial Programming mode
(ICSP).
Read the unique Application ID Word stored in
the executive memory.
Confirming the Presence of the
Programming Executive
beginning
Enter ICSP™ Mode
Resident in Memory
Prog. Executive is
Application ID
Application ID
from Address
Read the
ID
805BEh
Finish
BBh?
Start
Is
Yes
Word
programming,
CONFIRMING PRESENCE
OF PROGRAMMING
EXECUTIVE
is
No
Prog. Executive must
BBh,
be Programmed
confirm
which
Advance Information
if
means
the
4.3
4.3.1
Perform the following steps to enter Enhanced ICSP
Program/Verify mode using MCLR:
1.
2.
3.
Figure 4-3 illustrates this procedure.
The programming voltage applied to MCLR is V
which
PIC24FXXKAXXX devices. There is no minimum time
requirement for holding at V
interval of at least P18 must elapse before presenting
the key sequence on PGDx.
The key sequence is a specific 32-bit pattern:
‘0100
0000‘ (more easily remembered as 4D434850h in
hexadecimal
Program/Verify mode only if the key sequence is valid.
The MSB of the most significant nibble must be shifted
in first.
Once the key sequence is complete, V
applied to MCLR and held at that level for as long as
the Program/Verify mode is to be maintained. An
interval of at least P19 and P7 must elapse before
presenting data on PGDx. Signals appearing on PGDx
before P7 has elapsed will not be interpreted as valid.
4.3.2
The
Program/Verify mode using the V
entering the mode using MCLR. The only differences
are that the programming voltage applied to V
V
PGDx, an interval of at least P18 should elapse.
Figure 4-4 illustrates this procedure.
Once the key sequence is complete, an interval of at
least P19 should elapse and the V
reduced to V
V
Program/Verify mode is to be maintained. An interval of
at least P19 and P7 should elapse before presenting
data on PGDx.
Signals appearing on PGDx before P7 has elapsed will
not be interpreted as valid.
On successful entry, the program memory can be
accessed and programmed in serial fashion. While in
the Program/Verify mode, all unused I/Os are placed in
the high-impedance state.
IHH
PP
Briefly drive the MCLR pin high, and then low.
Clock a 32-bit key sequence into PGDx.
Drive the MCLR high within a specified period
and continue to hold high.
, and before presenting the key sequence on
and held at that level for as long as the
procedure
1101
is
Entering Enhanced ICSP Mode
LOW-VOLTAGE ENTRY
HIGH-VOLTAGE ENTRY
essentially
IH
. The voltage, V
format).
0100
for
© 2008 Microchip Technology Inc.
0011
entering
The
V
IH
DD
. After V
IH
0100
PP
device
, must be applied to
in
Enhanced
pin is the same as
IH
the
IHH
is removed, an
1000
IH
will
should be
case
must be
0101
enter
ICSP
PP
IH
of
is
,

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