PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 3

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA102-I/SS
Manufacturer:
MICRCOHI
Quantity:
20 000
TABLE 2-1:
2.4
The program memory map extends from 000000h to
FFFFFEh. Code storage is located at the base of the
memory map, and supports up to 5.5K instruction
words (about 16 Kbytes).
Table 2-3 provides the program memory size and
number of program memory rows present in each
device variant.
The PIC24FXXKA1XX family devices have an on-chip
data EEPROM. This data EEPROM is mapped to the
program memory area from location 7FFE00h to
7FFFFEh.
Table 2-4 provides the data EEPROM size and the
number of rows present in each device variant.
The erase operation can be done on one word, half of
a row or one row at a time. The program operation can
be done only one word at a time.
Locations, 800000h through 8007FEh, are reserved for
executive code memory. This region stores the
programming executive, the debugging executive and
the Diagnostic Words. The programming executive is
used for device programming, and the debug executive
is used for in-circuit debugging. This region of memory
cannot be used to store user code.
The device Configuration registers are implemented
from location F80000h to F80010h, and can be erased
or programmed one register at a time.
Table 2-2 provides the implemented Configuration
registers and their locations.
Locations, FF0000h and FF0002h, are reserved for the
Device ID registers. These bits can be used by the
programmer to identify the device type that is being
programmed. See Section 6.0 “Device ID” for more
information. The Device ID registers read out normally
even after code protection is applied.
Figure 2-3
PIC24FXXKAXXX family variants.
© 2008 Microchip Technology Inc.
MCLR/V
V
V
PGCx
PGDx
Legend: I = Input, O = Output, P = Power
DD
SS
Pin Name
Memory Map
PP
depicts
PIN DESCRIPTIONS (DURING PROGRAMMING)
MCLR/V
Pin Name
the
PGC
PGD
V
V
DD
SS
memory
PP
Pin Type
map
I/O
P
P
P
I
Advance Information
for
the
Programming Enable
Power Supply
Ground
Programming Pin Pair: Serial Clock
Programming Pin Pair: Serial Data
During Programming
TABLE 2-2:
TABLE 2-3:
TABLE 2-4:
PIC24F08KA101
PIC24F16KA101
PIC24F08KA102
PIC24F16KA102
PIC24F04KA200
PIC24F04KA201
PIC24F08KA101
PIC24F16KA101
PIC24F08KA102
PIC24F16KA102
FBS
FGS
FOSCSEL
FOSC
FWDT
FPOR
FICD
FDS
PIC24FXXKAXXX
Configuration Register
PIC24FXXKA1XX
Note:
Note:
Device User
Device
PIC24FXXKAXXX
An erase operation can be performed on
one, two or four rows at a time, and a
program operation can be performed on
one row at a time.
An erase operation can be performed on
one, four or eight words at a time and a
program operation can be performed on
one word at a time.
Pin Description
CONFIGURATION REGISTER
LOCATIONS
CODE MEMORY SIZE
DATA EEPROM MEMORY SIZE
Size in Words
Data EEPROM
(Instruction Words)
Memory No. of
Address Limit
AFE (1.375K)
AFE (1.375K)
15FE (2.75K)
15FE (2.75K)
2BFE (5.5K)
2BFE (5.5K)
256
256
256
256
Address
F8000C
F80000
F80004
F80008
F8000A
F8000E
F80010
F80006
DS39919A-page 3
No. of Rows
32
32
32
32
No. of
Rows
176
176
88
88
44
44

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