PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 32

• Manufacturer Part Number: PIC24F16KA102-I/SS
• Description: IC PIC MCU FLASH 16K 28-SSOP
• Manufacturer: Microchip Technology
• Series: PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

• Program Memory Type: FLASH
• Program Memory Size: 16KB (5.5K x 24)
• Package / Case: 28-SSOP
• Core Processor: PIC
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 24
• Eeprom Size: 512 x 8
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: PIC24F
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 1.5 KB
• Interface Type: I2C/IrDA/SPI/UART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, DM240001
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 9-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

PIC24FXXKAXXX
5.0
This section describes the programming executive
communication, programming executive commands,
programming
programming executive to memory and programming
verification.
5.1
The programmer and the programming executive have
a master-slave relationship, where the programmer is
the master programming device and the programming
executive is the slave.
Communication is initiated by the programmer in the
form of a command. Only one command at a time can be
sent to the programming executive. The programming
executive, in turn, only sends one response to the
programmer after receiving and processing a command.
The programming executive command set is described
in
Commands”. The response set is described in
Section 5.3 “Programming Executive Responses”.
5.1.1
The Enhanced ICSP interface is a two-wire SPI,
implemented using the PGCx and PGDx pins. The
PGCx pin is used as a clock input pin; the programmer
should provide the clock source. The PGDx pin is used
to send the command data to, and receive response
data from, the programming executive.
Data transmits to the device should change on the
rising edge and hold on the falling edge of PGCx.
Data receives from the device change on the falling
edge and holds on the rising edge of PGCx.
The data transmissions are sent to the MSB first using
16-bit mode (see Figure 5-1 and Figure 5-2).
DS39919A-page 32
Section 5.2
THE PROGRAMMING
EXECUTIVE
Programming Executive
Communication
COMMUNICATION INTERFACE
AND PROTOCOL
responses,
“Programming
programming
Advance Information
Executive
the
FIGURE 5-1:
As a 2-wire SPI is used and data transmissions are
half-duplex, a simple protocol is used to control the
direction of PGDx. When the programmer completes a
command transmission, it releases the PGDx line and
allows the programming executive to drive this line
high. The programming executive keeps the PGDx line
high to indicate that it is processing the command.
After the programming executive has processed the
command, it brings PGDx low for 15 μsec to indicate to
the programmer that the response is available to be
clocked out. The programmer can begin to clock out
the response 23 μsec after PGDx is brought low, and it
must provide the necessary amount of clock pulses to
receive the entire response from the programming
executive.
After the entire response is clocked out, the
programmer should terminate the clock on PGCx until
it is time to send another command to the programming
executive; Figure 5.2 displays this protocol.
5.1.2
In Enhanced ICSP mode, the PIC24FXXKAXXX family
devices operate from the internal Fast RC Oscillator,
which has a nominal frequency of 8 MHz. This
oscillator frequency yields an effective system clock
frequency of 4 MHz. To ensure that the programmer
does not clock too fast, it is recommended that a 4 MHz
clock be provided by the programmer.
FIGURE 5-2:
PGCx
PGCx
PGDx
PGDx
MSb
MSb
1
1
P1B
P1B
P1A
P1A
14
SPI RATE
2
2
14
13
3
3
P1
13
P1
12
4
4
12
11
PROGRAMMING
EXECUTIVE SERIAL
TIMING FOR DATA
RECEIVED FROM DEVICE
PROGRAMMING
EXECUTIVE SERIAL
TIMING FOR DATA
TRANSMITTED TO DEVICE
5
5
11
© 2008 Microchip Technology Inc.
...
6
6
...
5
11
11
5
4
P2
P2
12
12
4
3
13
13
3
2
14
14
2
P3
P3
1
15
15
1
LSb
LSb
16
16