PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 5

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PIC24F16KA102-I/SS
Manufacturer:
MICRCOHI
Quantity:
20 000
3.0
The ICSP method is a special programming protocol
that
PIC24FXXKAXXX device family memory. ICSP is the
most direct method used to program a device;
however, Enhanced ICSP is faster. The ICSP mode
also reads the contents of the executive memory to
determine if the programming executive is present.
This is accomplished by applying control codes and
instructions, serially to the device, using PGCx and
PGDx pins.
In ICSP mode, the system clock is taken from the
PGCx pin regardless of the device‘s oscillator
Configuration bits. All of the instructions are shifted
serially to an internal buffer, loaded into the Instruction
Register (IR), and then executed. No program is
fetched from the internal memory. Instructions are fed
in 24 bits at a time. PGDx is used to shift data in, and
PGCx is used as both the serial shift clock and the CPU
execution clock.
3.1
Figure 3-1 illustrates the high-level overview of the
programming process.
After entering the ICSP mode, perform the following:
1.
2.
3.
4.
5.
© 2008 Microchip Technology Inc.
Note:
Bulk Erase the device.
Program and verify the code memory.
Program and verify the data EEPROM memory.
Program and verify the device configuration.
Program the code-protect Configuration bits if
required.
allows
DEVICE PROGRAMMING –
ICSP
Overview of the Programming
Process
During ICSP operation, the operating
frequency of PGCx should not exceed
10 MHz.
reading
and
writing
Advance Information
to
the
FIGURE 3-1:
3.2
Upon entry into ICSP mode, the CPU is Idle. An
internal state machine governs the execution of the
CPU. A 4-bit control code is clocked in, using PGCx
and PGDx, and this control code is used to command
the CPU (see Table 3-1).
The SIX control code is used to send instructions to the
CPU for execution, and the REGOUT control code is
used to read data out of the device via the VISI register.
TABLE 3-1:
0000b
0001b
0010b-1111b N/A
Control Code
4-Bit
PIC24FXXKAXXX
ICSP Operation
Program Data EEPROM Memory
Verify Data EEPROM Memory
Program Configuration Bits
Mnemonic
SIX
REGOUT
Verify Configuration Bits
CPU CONTROL CODES IN
ICSP™ MODE
Enter ICSP™ Mode
Program Memory
Exit ICSP Mode
Verify Program
Perform Bulk
HIGH–LEVEL ICSP™
PROGRAMMING FLOW
Erase
Start
End
Shift in 24-bit instruction
and execute.
Shift out the VISI
(0784h) register.
This is reserved.
Description
DS39919A-page 5

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