IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part NumberPIC24F16KA102-I/SS
DescriptionIC PIC MCU FLASH 16K 28-SSOP
ManufacturerMicrochip Technology
SeriesPIC® XLP™ 24F
PIC24F16KA102-I/SS datasheets
 


Specifications of PIC24F16KA102-I/SS

Program Memory TypeFLASHProgram Memory Size16KB (5.5K x 24)
Package / Case28-SSOPCore ProcessorPIC
Core Size16-BitSpeed32MHz
ConnectivityI²C, IrDA, SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, WDT
Number Of I /o24Eeprom Size512 x 8
Ram Size1.5K x 8Voltage - Supply (vcc/vdd)1.8 V ~ 3.6 V
Data ConvertersA/D 9x10bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CProcessor SeriesPIC24F
CorePICData Bus Width16 bit
Data Ram Size1.5 KBInterface TypeI2C/IrDA/SPI/UART
Maximum Clock Frequency32 MHzNumber Of Programmable I/os24
Number Of Timers3Operating Supply Voltage1.8 V to 3.6 V
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature- 40 COn-chip Adc9-ch x 10-bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithMA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
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13.0
TIMER2/3
This data sheet summarizes the features
Note:
of this group of PIC24F devices. It is not
intended to be a comprehensive reference
source. For more information on Timers,
refer to the “PIC24F Family Reference
Manual”,
Section
14.
(DS39704).
The Timer2/3 module is a 32-bit timer, which can also be
configured as two independent 16-bit timers with
selectable operating modes.
As a 32-bit timer, Timer2/3 operates in three modes:
• Two independent 16-bit timers (Timer2 and
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
• Single 32-bit timer
• Single 32-bit synchronous counter
They also support these features:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit Period register match
• ADC Event Trigger
Individually, both of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the ADC event trigger
(this is implemented only with Timer3). The operating
modes and enabled features are determined by setting
the appropriate bit(s) in the T2CON and T3CON
registers. T2CON and T3CON are provided in generic
form in Register 13-1 and Register 13-2, respectively.
For 32-bit timer/counter operation, Timer2 is the least
significant word (lsw) and Timer3 is the most significant
word (msw) of the 32-bit timer.
For 32-bit operation, T3CON control bits
Note:
are ignored. Only T2CON control bits are
used for setup and control. Timer2 clock
and gate inputs are utilized for the 32-bit
timer modules, but an interrupt is generated
with the Timer3 interrupt flags.
© 2009 Microchip Technology Inc.
PIC24F16KA102 FAMILY
To configure Timer2/3 for 32-bit operation:
1.
Set the T32 bit (T2CON<3> = 1).
2.
Select the prescaler ratio for Timer2 using the
TCKPS<1:0> bits.
3.
Set the Clock and Gating modes using the TCS
and TGATE bits.
4.
Load the timer period value. PR3 will contain the
“Timers”
msw of the value while PR2 contains the lsw.
5.
If interrupts are required, set the interrupt enable
bit, T3IE; use the priority bits, T3IP<2:0>, to set
the interrupt priority.
While Timer2 controls the timer, the interrupt
appears as a Timer3 interrupt.
6.
Set the TON bit (= 1).
The timer value, at any point, is stored in the register
pair, TMR<3:2>. TMR3 always contains the msw of the
count, while TMR2 contains the lsw.
To configure any of the timers for individual 16-bit
operation:
1.
Clear the T32 bit in T2CON<3>.
2.
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
3.
Set the Clock and Gating modes using the TCS
and TGATE bits.
4.
Load the timer period value into the PRx register.
5.
If interrupts are required, set the interrupt enable
bit, TxIE; use the priority bits, TxIP<2:0>, to set
the interrupt priority.
6.
Set the TON bit (TxCON<15> = 1).
Preliminary
DS39927B-page 113