PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 131

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
To set up the SPI module for the Enhanced Buffer
Master (EBM) mode of operation:
1.
2.
3.
4.
5.
6.
FIGURE 16-2:
© 2009 Microchip Technology Inc.
SS1/FSYNC1
If using interrupts:
a)
b)
c)
Write the desired settings to the SPI1CON1
and SPI1CON2 registers with the MSTEN bit
(SPI1CON1<5>) = 1.
Clear the SPIROV bit (SPI1STAT<6>).
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPI1CON2<0>).
Enable SPI operation by setting the SPIEN bit
(SPI1STAT<15>).
Write the data to be transmitted to the SPI1BUF
register. Transmission (and reception) will start
as soon as data is written to the SPI1BUF
register.
SDO1
SCK1
SDI1
Clear the respective SPI1IF bit in the IFS0
register.
Set the respective SPI1IE bit in the IEC0
register.
Write the respective SPI1IPx bits in the
IPC2 register.
Read SPI1BUF
Control
Transfer
Sync
SPI1 MODULE BLOCK DIAGRAM (ENHANCED BUFFER MODE)
Receive Buffer
8-Level FIFO
bit 0
Control
SPI1SR
Clock
SPI1BUF
Shift Control
Transmit Buffer
8-Level FIFO
Preliminary
Transfer
Write SPI1BUF
PIC24F16KA102 FAMILY
Select
Edge
To set up the SPI module for the Enhanced Buffer
Slave mode of operation:
1.
2.
3.
4.
5.
6.
7.
8.
16
Clear the SPI1BUF register.
If using interrupts:
a)
b)
c)
Write the desired settings to the SPI1CON1 and
SPI1CON2 registers with the MSTEN bit
(SPI1CON1<5>) = 0.
Clear the SMP bit.
If the CKE bit is set, then the SSEN bit must be
set, thus enabling the SS1 pin.
Clear the SPIROV bit (SPI1STAT<6>).
Select Enhanced Buffer mode by setting the
SPIBEN bit (SPI1CON2<0>).
Enable SPI operation by setting the SPIEN bit
(SPI1STAT<15>).
Secondary
1:1 to 1:8
Prescaler
Clear the respective SPI1IF bit in the IFS0
register.
Set the respective SPI1IE bit in the IEC0
register.
Write the respective SPI1IPx bits in the
IPC2 register to set the interrupt priority.
Internal Data Bus
1:1/4/16/64
Prescaler
Primary
DS39927B-page 129
SPI1CON1<1:0>
SPI1CON1<4:2>
Enable
Master Clock
F
CY

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