PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 134

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC24F16KA102 FAMILY
REGISTER 16-2:
DS39927B-page 132
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12
bit 11
bit 10
bit 9
bit 8
bit 7
bit 6
bit 5
bit 4-2
Note 1:
R/W-0
SSEN
U-0
The CKE bit is not used in the Framed SPI modes. The user should program this bit to ‘0’ for the Framed
SPI modes (FRMEN = 1).
Unimplemented: Read as ‘0’
DISSCK: Disable SCK1 pin bit (SPI Master modes only)
1 = Internal SPI clock is disabled, pin functions as I/O
0 = Internal SPI clock is enabled
DISSDO: Disables SDO1 pin bit
1 = SDO1 pin is not used by module; pin functions as I/O
0 = SDO1 pin is controlled by the module
MODE16: Word/Byte Communication Select bit
1 = Communication is word-wide (16 bits)
0 = Communication is byte-wide (8 bits)
SMP: SPI1 Data Input Sample Phase bit
Master mode:
1 = Input data sampled at end of data output time
0 = Input data sampled at middle of data output time
Slave mode:
SMP must be cleared when SPI1 is used in Slave mode.
CKE: SPI1 Clock Edge Select bit
1 = Serial output data changes on transition from active clock state to Idle clock state (see bit 6)
0 = Serial output data changes on transition from Idle clock state to active clock state (see bit 6)
SSEN: Slave Select Enable bit (Slave mode)
1 = SS1 pin used for Slave mode
0 = SS1 pin not used by module; pin controlled by port function
CKP: Clock Polarity Select bit
1 = Idle state for clock is a high level; active state is a low level
0 = Idle state for clock is a low level; active state is a high level
MSTEN: Master Mode Enable bit
1 = Master mode
0 = Slave mode
SPRE<2:0>: Secondary Prescale bits (Master mode)
111 = Secondary prescale 1:1
110 = Secondary prescale 2:1
.
.
.
000 = Secondary prescale 8:1
R/W-0
CKP
U-0
SPI1CON1: SPI1 CONTROL REGISTER 1
W = Writable bit
‘1’ = Bit is set
MSTEN
R/W-0
U-0
DISSCK
SPRE2
R/W-0
R/W-0
(1)
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DISSDO
SPRE1
R/W-0
R/W-0
MODE16
SPRE0
R/W-0
R/W-0
© 2009 Microchip Technology Inc.
x = Bit is unknown
PPRE1
R/W-0
R/W-0
SMP
PPRE0
CKE
R/W-0
R/W-0
(1)
bit 8
bit 0

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