IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part NumberPIC24F16KA102-I/SS
DescriptionIC PIC MCU FLASH 16K 28-SSOP
ManufacturerMicrochip Technology
SeriesPIC® XLP™ 24F
PIC24F16KA102-I/SS datasheets
 


Specifications of PIC24F16KA102-I/SS

Program Memory TypeFLASHProgram Memory Size16KB (5.5K x 24)
Package / Case28-SSOPCore ProcessorPIC
Core Size16-BitSpeed32MHz
ConnectivityI²C, IrDA, SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, WDT
Number Of I /o24Eeprom Size512 x 8
Ram Size1.5K x 8Voltage - Supply (vcc/vdd)1.8 V ~ 3.6 V
Data ConvertersA/D 9x10bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CProcessor SeriesPIC24F
CorePICData Bus Width16 bit
Data Ram Size1.5 KBInterface TypeI2C/IrDA/SPI/UART
Maximum Clock Frequency32 MHzNumber Of Programmable I/os24
Number Of Timers3Operating Supply Voltage1.8 V to 3.6 V
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature- 40 COn-chip Adc9-ch x 10-bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithMA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
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TABLE 4-12:
PORTA REGISTER MAP
File
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Name
TRISA
02C0
PORTA
02C2
LATA
02C4
ODCA
02C6
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Legend:
Bit available only when MCLRE = 0.
Note
1:
A read of RA1 and RA0 results in ‘0’ when debug is active on the PGC2/PGD2 pin.
2:
A read of RA4 results in ‘0’ when debug is active on the PGC3/PGD3 pin.
3:
These bits are not implemented in 20-pin devices.
4:
Bits are available only when the primary oscillator is disabled (POSCMD1:POSCMD0 = 00); otherwise read as ‘0’.
5:
Bits are available only when the primary oscillator is disabled or EC mode is selected (POSCMD1:POSCMD0 = 00 or 11) and CLKO is disabled (OSCIOFNC = 0); otherwise read as ‘0’.
6:
TABLE 4-13:
PORTB REGISTER MAP
File
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Name
TRISB
02C8
TRISB15
TRISB14
TRISB13
TRISB12
PORTB 02CA
RB15
RB14
RB13
RB12
LATB
02CC
LATB15
LATB14
LATB13
LATB12
ODCB
02CE
ODB15
ODB14
ODB13
ODB12
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Legend:
A read of RB1 and RB0 results in ‘0’ when debug is active on the PGEC1/PGED1 pins.
Note
1:
A read of RB4 results in ‘0’ when debug is active on the PGEC3/PGED3 pins.
2:
PORTB bits, 11, 10, 6, 5 and 3, are not implemented in 20-pin devices.
3:
TABLE 4-14:
PAD CONFIGURATION REGISTER MAP
File
Addr
Bit 15
Bit 14
Bit 13
Bit 12
Bit 11
Name
PADCFG1 02FC
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Legend:
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
TRISA7
(4)
TRISA6
(4)
RA7
RA6
LATA7
(4)
LATA6
(4)
ODA7
ODA6
Bit 11
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
(3)
(3)
TRISB11
TRISB10
TRISB9
TRISB8
TRISB7
TRISB6
RB11
(3)
RB10
(3)
RB9
RB8
RB7
RB6
(3)
(3)
LATB11
LATB10
LATB9
LATB8
LATB7
LATB6
ODB11
ODB10
ODB9
ODB8
ODB7
ODB6
Bit 10
Bit 9
Bit 8
Bit 7
Bit 6
Bit 5
SMBUSDEL OC1TRIS
(1)
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
TRISA4
TRISA3
(5,6)
TRISA2
(5)
TRISA1
(3)
(5,6)
(5)
(2)
RA5
RA4
RA3
RA2
RA1
LATA4
LATA3
(5,6)
LATA2
(5)
LATA1
(5,6)
(5)
ODA4
ODA3
ODA2
ODA1
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(3)
(3)
(3)
TRISB5
TRISB4
TRISB3
TRISB2
TRISB1
(3)
RB5
(3)
RB4
(2)
RB3
(3)
RB2
RB1
(1)
(3)
(3)
(3)
LATB5
LATB4
LATB3
LATB2
LATB1
ODB5
ODB4
ODB3
ODB2
ODB1
Bit 4
Bit 3
Bit 2
Bit 1
RTSECSEL1
RTSECSEL0
All
Bit 0
Resets
TRISA0
00DF
(2)
RA0
xxxx
LATA0
xxxx
ODA0
0000
All
Bit 0
Resets
TRISB0
FFFF
RB0
(1)
xxxx
LATB0
xxxx
ODB0
0000
Bit 0
All Resets
0000