PIC24F16KA102-I/SS Microchip Technology, PIC24F16KA102-I/SS Datasheet - Page 35

IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part Number
PIC24F16KA102-I/SS
Description
IC PIC MCU FLASH 16K 28-SSOP
Manufacturer
Microchip Technology
Series
PIC® XLP™ 24Fr

Specifications of PIC24F16KA102-I/SS

Program Memory Type
FLASH
Program Memory Size
16KB (5.5K x 24)
Package / Case
28-SSOP
Core Processor
PIC
Core Size
16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
24
Eeprom Size
512 x 8
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
PIC24F
Core
PIC
Data Bus Width
16 bit
Data Ram Size
1.5 KB
Interface Type
I2C/IrDA/SPI/UART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
24
Number Of Timers
3
Operating Supply Voltage
1.8 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature
- 40 C
On-chip Adc
9-ch x 10-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
MA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
TABLE 4-12:
TABLE 4-13:
TABLE 4-14:
TRISA
PORTA
LATA
ODCA
Legend:
Note
TRISB
PORTB 02CA
LATB
ODCB
Legend:
Note
Legend:
PADCFG1 02FC
Name
Name
File
Name
File
File
1:
2:
3:
4:
5:
6:
1:
2:
3:
02CC
02CE
Addr
02C8
Addr
02C0
02C2
02C4
02C6
Addr
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Bit available only when MCLRE = 0.
A read of RA1 and RA0 results in ‘0’ when debug is active on the PGC2/PGD2 pin.
A read of RA4 results in ‘0’ when debug is active on the PGC3/PGD3 pin.
These bits are not implemented in 20-pin devices.
Bits are available only when the primary oscillator is disabled (POSCMD1:POSCMD0 = 00); otherwise read as ‘0’.
Bits are available only when the primary oscillator is disabled or EC mode is selected (POSCMD1:POSCMD0 = 00 or 11) and CLKO is disabled (OSCIOFNC = 0); otherwise read as ‘0’.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
A read of RB1 and RB0 results in ‘0’ when debug is active on the PGEC1/PGED1 pins.
A read of RB4 results in ‘0’ when debug is active on the PGEC3/PGED3 pins.
PORTB bits, 11, 10, 6, 5 and 3, are not implemented in 20-pin devices.
— = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
TRISB15
LATB15
ODB15
Bit 15
RB15
Bit 15
PORTA REGISTER MAP
PORTB REGISTER MAP
PAD CONFIGURATION REGISTER MAP
Bit 15
Bit 14
TRISB14
LATB14
ODB14
Bit 14
RB14
Bit 14
Bit 13
TRISB13
LATB13
ODB13
Bit 13
Bit 13
RB13
Bit 12
Bit 12
TRISB12
LATB12
ODB12
Bit 12
RB12
Bit 11
Bit 11
TRISB11
LATB11
RB11
ODB11
Bit 10
Bit 11
(3)
(3)
(3)
Bit 10
Bit 9
TRISB10
LATB10
RB10
ODB10
Bit 10
(3)
(3)
(3)
Bit 8
Bit 9
TRISB9
LATB9
ODB9
Bit 9
RB9
Bit 7
Bit 8
TRISB8
LATB8
ODB8
Bit 8
RB8
Bit 6
TRISA7
LATA7
ODA7
RA7
Bit 7
TRISB7
LATB7
ODB7
(4)
Bit 7
RB7
(4)
(4)
Bit 5
(4)
TRISA6
LATA6
ODA6
Bit 6
RA6
TRISB6
LATB6
SMBUSDEL OC1TRIS
RB6
ODB6
Bit 6
Bit 4
(3)
(3)
(3)
Bit 5
RA5
TRISB5
LATB5
RB5
ODB5
Bit 5
(1)
(3)
Bit 3
(3)
(3)
TRISA4
RA4
LATA4
ODA4
Bit 4
TRISB4
LATB4
RB4
ODB4
Bit 4
(3)
(2)
RTSECSEL1
TRISA3
LATA3
ODA3
Bit 2
RA3
TRISB3
LATB3
Bit 3
RB3
ODB3
Bit 3
(5,6)
(5,6)
(5,6)
(5,6)
(3)
(3)
(3)
TRISA2
LATA2
ODA2
TRISB2
RA2
LATB2
ODB2
Bit 2
Bit 2
RB2
RTSECSEL0
(5)
(5)
(5)
(5)
Bit 1
TRISA1
TRISB1
RA1
LATA1
ODA1
RB1
LATB1
ODB1
Bit 1
Bit 1
(2)
(1)
Bit 0
TRISA0
TRISB0
RA0
LATA0
ODA0
LATB0
RB0
ODB0
Bit 0
Bit 0
(2)
(1)
All Resets
0000
Resets
Resets
00DF
xxxx
xxxx
0000
FFFF
xxxx
xxxx
0000
All
All

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