IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part NumberPIC24F16KA102-I/SS
DescriptionIC PIC MCU FLASH 16K 28-SSOP
ManufacturerMicrochip Technology
SeriesPIC® XLP™ 24F
PIC24F16KA102-I/SS datasheets
 


Specifications of PIC24F16KA102-I/SS

Program Memory TypeFLASHProgram Memory Size16KB (5.5K x 24)
Package / Case28-SSOPCore ProcessorPIC
Core Size16-BitSpeed32MHz
ConnectivityI²C, IrDA, SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, WDT
Number Of I /o24Eeprom Size512 x 8
Ram Size1.5K x 8Voltage - Supply (vcc/vdd)1.8 V ~ 3.6 V
Data ConvertersA/D 9x10bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CProcessor SeriesPIC24F
CorePICData Bus Width16 bit
Data Ram Size1.5 KBInterface TypeI2C/IrDA/SPI/UART
Maximum Clock Frequency32 MHzNumber Of Programmable I/os24
Number Of Timers3Operating Supply Voltage1.8 V to 3.6 V
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature- 40 COn-chip Adc9-ch x 10-bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithMA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
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PIC24F16KA102 FAMILY
TABLE 4-24:
PROGRAM SPACE ADDRESS CONSTRUCTION
Access
Access Type
Space
Instruction Access
User
(Code Execution)
User
TBLRD/TBLWT
(Byte/Word Read/Write)
Configuration
Program Space Visibility
User
(Block Remap/Read)
Data EA<15> is always ‘1’ in this case, but is not used in calculating the program space address. Bit 15 of
Note 1:
the address is PSVPAG<0>.
PSVPAG can have only two values (‘00’ to access program memory and FF to access data EEPROM) on
2:
the PIC24F16KA102 family.
FIGURE 4-5:
DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION
(1)
Program Counter
(2)
Table Operations
(1)
Program Space Visibility
(Remapping)
User/Configuration
Space Select
Note 1: The LSb of program space addresses is always fixed as ‘0’ in order to maintain word alignment of data in the
program and data spaces.
2: Table operations are not required to be word-aligned. Table read operations are permitted in the configuration
memory space.
DS39927B-page 38
Program Space Address
<23>
<22:16>
0
0xx xxxx xxxx xxxx xxxx xxx0
TBLPAG<7:0>
0xxx xxxx
TBLPAG<7:0>
1xxx xxxx
PSVPAG<7:0>
0
0
xxxx xxxx
Program Counter
0
23 Bits
TBLPAG
1/0
8 Bits
24 Bits
Select
1
PSVPAG
0
8 Bits
23 Bits
Preliminary
<15>
<14:1>
<0>
PC<22:1>
0
Data EA<15:0>
xxxx xxxx xxxx xxxx
Data EA<15:0>
xxxx xxxx xxxx xxxx
(2)
(1)
Data EA<14:0>
xxx xxxx xxxx xxxx
0
EA
1/0
16 Bits
EA
0
15 Bits
Byte Select
© 2009 Microchip Technology Inc.