IC PIC MCU FLASH 16K 28-SSOP

PIC24F16KA102-I/SS

Manufacturer Part NumberPIC24F16KA102-I/SS
DescriptionIC PIC MCU FLASH 16K 28-SSOP
ManufacturerMicrochip Technology
SeriesPIC® XLP™ 24F
PIC24F16KA102-I/SS datasheets
 


Specifications of PIC24F16KA102-I/SS

Program Memory TypeFLASHProgram Memory Size16KB (5.5K x 24)
Package / Case28-SSOPCore ProcessorPIC
Core Size16-BitSpeed32MHz
ConnectivityI²C, IrDA, SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, WDT
Number Of I /o24Eeprom Size512 x 8
Ram Size1.5K x 8Voltage - Supply (vcc/vdd)1.8 V ~ 3.6 V
Data ConvertersA/D 9x10bOscillator TypeInternal
Operating Temperature-40°C ~ 85°CProcessor SeriesPIC24F
CorePICData Bus Width16 bit
Data Ram Size1.5 KBInterface TypeI2C/IrDA/SPI/UART
Maximum Clock Frequency32 MHzNumber Of Programmable I/os24
Number Of Timers3Operating Supply Voltage1.8 V to 3.6 V
Maximum Operating Temperature+ 85 CMounting StyleSMD/SMT
3rd Party Development Tools52713-733, 52714-737, 53276-922, EWDSPICDevelopment Tools By SupplierPG164130, DV164035, DV244005, DV164005, DM240001
Minimum Operating Temperature- 40 COn-chip Adc9-ch x 10-bit
Lead Free Status / RoHS StatusLead free / RoHS CompliantFor Use WithMA240017 - MODULE PLUG-IN PIC24F16KA102 PIM
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REGISTER 5-1:
NVMCON: FLASH MEMORY CONTROL REGISTER
R/SO-0, HC
R/W-0
R/W-0
WR
WREN
WRERR
bit 15
U-0
R/W-0
R/W-0
(1)
ERASE
NVMOP5
bit 7
SO = Settable Only bit
Legend:
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15
WR: Write Control bit
1 = Initiates a Flash memory program or erase operation. The operation is self-timed and the bit is
cleared by hardware once the operation is complete
0 = Program or erase operation is complete and inactive
bit 14
WREN: Write Enable bit
1 = Enable Flash program/erase operations
0 = Inhibit Flash program/erase operations
bit 13
WRERR: Write Sequence Error Flag bit
1 = An improper program or erase sequence attempt or termination has occurred (bit is set automatically
on any set attempt of the WR bit)
0 = The program or erase operation completed normally
bit 12
PGMONLY: Program Only Enable bit
bit 11-7
Unimplemented: Read as ‘0’
bit 6
ERASE: Erase/Program Enable bit
1 = Perform the erase operation specified by NVMOP<5:0> on the next WR command
0 = Perform the program operation specified by NVMOP<5:0> on the next WR command
bit 5-0
NVMOP<5:0>: Programming Operation Command Byte bits
Erase Operations (when ERASE bit is ‘1’):
1010xx = Erase entire boot block (including code-protected boot block)
1001xx = Erase entire memory (including boot block, configuration block, general block)
011010 = Erase 4 rows of Flash memory
011001 = Erase 2 rows of Flash memory
011000 = Erase 1 row of Flash memory
0101xx = Erase entire configuration block (except code protection bits)
0100xx = Erase entire data EEPROM
0011xx = Erase entire general memory block programming operations
0001xx = Write 1 row of Flash memory (when ERASE bit is ‘0’)
All other combinations of NVMOP<5:0> are no operation.
Note 1:
Available in ICSP™ mode only. Refer to device programming specification.
2:
The address in the Table Pointer decides which rows will be erased.
3:
This bit is used only while accessing data EEPROM.
4:
© 2009 Microchip Technology Inc.
PIC24F16KA102 FAMILY
R/W-0
U-0
U-0
(4)
PGMONLY
R/W-0
R/W-0
R/W-0
(1)
(1)
NVMOP4
NVMOP3
NVMOP2
HC = Hardware Clearable bit
R = Readable bit
U = Unimplemented bit, read as ‘0’
(4)
(1)
(3)
(3)
(3)
(4)
(3)
Preliminary
U-0
U-0
bit 8
R/W-0
R/W-0
(1)
(1)
(1)
NVMOP1
NVMOP0
bit 0
W = Writable bit
(2)
(2)
DS39927B-page 45