PIC18LF2410T-I/SO Microchip Technology, PIC18LF2410T-I/SO Datasheet - Page 102

IC MCU FLASH 8KX16 28SOIC

PIC18LF2410T-I/SO

Manufacturer Part Number
PIC18LF2410T-I/SO
Description
IC MCU FLASH 8KX16 28SOIC
Manufacturer
Microchip Technology
Series
PIC® 18Fr

Specifications of PIC18LF2410T-I/SO

Core Processor
PIC
Core Size
8-Bit
Speed
40MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 10x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
PIC18F2X1X/4X1X
TABLE 9-5:
DS39636D-page 104
RC0/T1OSO/
T13CKI
RC1/T1OSI/CCP2
RC2/CCP1/P1A
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO
RC6/TX/CK
RC7/RX/DT
Legend:
Note 1:
2:
Pin
DIG = Digital level output; TTL = TTL input buffer; ST = Schmitt Trigger input buffer; ANA = Analog level input/output;
I
Default assignment for CCP2 when the CCP2MX Configuration bit is set. Alternate assignment is RB3.
Enhanced PWM output is available only on PIC18F4410/4415/4510/4515/4610 devices.
2
C/SMB = I
PORTC I/O SUMMARY
Function
CCP2
T1OSO
T13CKI
T1OSI
P1A
CCP1
SDO
RC0
RC1
RC2
RC3
SCK
RC4
SDA
RC5
RC6
RC7
SCL
SDI
CK
RX
TX
DT
2
C/SMBus input buffer; x = Don’t care (TRIS bit does not affect port direction or is overridden for this option).
(2)
(1)
Setting
TRIS
0
1
x
1
0
1
x
0
1
0
1
0
1
0
0
1
0
1
0
1
0
1
1
1
1
0
1
0
0
1
1
1
1
0
1
1
1
1
I/O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
I
2
2
C/SMB I
C/SMB I
Type
ANA
ANA
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
DIG
I/O
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
ST
LATC<0> data output.
PORTC<0> data input.
Timer1 oscillator output; enabled when Timer1 oscillator enabled.
Disables digital I/O.
Timer1/Timer3 counter input.
LATC<1> data output.
PORTC<1> data input.
Timer1 oscillator input; enabled when Timer1 oscillator enabled.
Disables digital I/O.
CCP2 compare and PWM output; takes priority over port data.
CCP2 capture input.
LATC<2> data output.
PORTC<2> data input.
ECCP1 compare or PWM output; takes priority over port data.
ECCP1 capture input.
ECCP1 Enhanced PWM output, channel A. May be configured for
tri-state during Enhanced PWM shutdown events. Takes priority over
port data.
LATC<3> data output.
PORTC<3> data input.
SPI clock output (MSSP module); takes priority over port data.
SPI clock input (MSSP module).
I
LATC<4> data output.
PORTC<4> data input.
SPI data input (MSSP module).
I
LATC<5> data output.
PORTC<5> data input.
SPI data output (MSSP module); takes priority over port data.
LATC<6> data output.
PORTC<6> data input.
Asynchronous serial transmit data output (USART module);
takes priority over port data. User must configure as output.
Synchronous serial clock output (USART module); takes priority
over port data.
Synchronous serial clock input (USART module).
LATC<7> data output.
PORTC<7> data input.
Asynchronous serial receive data input (USART module).
Synchronous serial data output (USART module); takes priority over
port data.
Synchronous serial data input (USART module). User must
configure as an input.
2
2
2
2
C™ clock output (MSSP module); takes priority over port data.
C clock input (MSSP module); input type depends on module setting.
C data output (MSSP module); takes priority over port data.
C data input (MSSP module); input type depends on module setting.
Description
© 2009 Microchip Technology Inc.

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