PIC18LF2410T-I/SO Microchip Technology, PIC18LF2410T-I/SO Datasheet - Page 115

• Manufacturer Part Number: PIC18LF2410T-I/SO
• Description: IC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2410T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

10.3
An 8-bit counter is available as a prescaler for the Timer0
module. The prescaler is not directly readable or writable;
its value is set by the PSA and T0PS2:T0PS0 bits
(T0CON<3:0>),
assignment and prescale ratio.
Clearing the PSA bit assigns the prescaler to the
Timer0 module. When it is assigned, prescale values
from 1:2 through 1:256 in power-of-2 increments are
selectable.
When assigned to the Timer0 module, all instructions
writing to the TMR0 register (e.g., CLRF TMR0, MOVWF
TMR0, BSF TMR0, etc.) clear the prescaler count.
TABLE 10-1:
© 2009 Microchip Technology Inc.
TMR0L
TMR0H
INTCON
T0CON
TRISA
Legend: Shaded cells are not used by Timer0.
Note 1:
Note:
Name
Prescaler
PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘0’.
Writing to TMR0 when the prescaler is
assigned to Timer0 will clear the prescaler
count but will not change the prescaler
assignment.
Timer0 Register, Low Byte
Timer0 Register, High Byte
GIE/GIEH PEIE/GIEL TMR0IE
TMR0ON
RA7
Bit 7
which
REGISTERS ASSOCIATED WITH TIMER0
(1)
determine
T08BIT
RA6
Bit 6
(1)
the
T0CS
Bit 5
RA5
prescaler
INT0IE
T0SE
Bit 4
RA4
10.3.1
The prescaler assignment is fully under software
control and can be changed “on-the-fly” during program
execution.
10.4
The TMR0 interrupt is generated when the TMR0
register overflows from FFh to 00h in 8-Bit mode, or from
FFFFh to 0000h in 16-Bit mode. This overflow sets the
TMR0IF flag bit. The interrupt can be masked by clear-
ing the TMR0IE bit (INTCON<5>). Before re-enabling
the interrupt, the TMR0IF bit must be cleared in software
by the Interrupt Service Routine.
Since Timer0 is shut down in Sleep mode, the TMR0
interrupt cannot awaken the processor from Sleep.
RBIE
Bit 3
PSA
RA3
PIC18F2X1X/4X1X
Timer0 Interrupt
TMR0IF
T0PS2
SWITCHING PRESCALER
ASSIGNMENT
Bit 2
RA2
INT0IF
T0PS1
Bit 1
RA1
T0PS0
RBIF
Bit 0
RA0
DS39636D-page 117
on page
Values
Reset
52
52
51
52
54