PIC18LF2410T-I/SO Microchip Technology, PIC18LF2410T-I/SO Datasheet - Page 130

• Manufacturer Part Number: PIC18LF2410T-I/SO
• Description: IC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2410T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC18F2X1X/4X1X
14.1
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
14.1.1
The CCP modules utilize Timers 1, 2 or 3, depending
on the mode selected. Timer1 and Timer3 are available
to modules in Capture or Compare modes, while
Timer2 is available for modules in PWM mode.
TABLE 14-1:
TABLE 14-2:
DS39636D-page 132
CCP1 Mode CCP2 Mode
Note 1:
Compare
Compare
Compare
Capture
Capture
Capture
PWM
PWM
PWM
CCP/ECCP Mode
Compare
Capture
(1)
(1)
(1)
CCP Module Configuration
PWM
Includes standard and Enhanced PWM operation.
CCP MODULES AND TIMER
RESOURCES
Compare
Compare
Compare
Capture
Capture
Capture
PWM
PWM
CCP MODE – TIMER
RESOURCE
INTERACTIONS BETWEEN CCP1 AND CCP2 FOR TIMER RESOURCES
PWM
(1)
(1)
Each module can use TMR1 or TMR3 as the time base. The time base can be different
for each CCP.
CCP2 can be configured for the special event trigger to reset TMR1 or TMR3
(depending upon which time base is used). Automatic A/D conversions on trigger event
can also be done. Operation of CCP1 could be affected if it is using the same timer as a
time base.
CCP1 can be configured for the special event trigger to reset TMR1 or TMR3 (depending
upon which time base is used). Operation of CCP2 could be affected if it is using the
same timer as a time base.
Either module can be configured for the Special Event Trigger to reset the time base.
Automatic A/D conversions on CCP2 trigger event can be done. Conflicts may occur if
both modules are using the same time base.
None
None
None
None
Both PWMs will have the same frequency and update rate (TMR2 interrupt).
Timer1 or Timer3
Timer1 or Timer3
Timer Resource
Timer2
The assignment of a particular timer to a module is
determined by the Timer-to-CCP enable bits in the
T3CON register (Register 13-1). Both modules may be
active at any given time and may share the same timer
resource if they are configured to operate in the same
mode (Capture/Compare or PWM) at the same time. The
interactions between the two modules are summarized in
Figure 14-1 and Figure 14-2. In Timer1 in Asynchronous
Counter mode, the capture operation will not work.
14.1.2
The pin assignment for CCP2 (Capture input, Compare
and PWM output) can change, based on device config-
uration. The CCP2MX Configuration bit determines
which pin CCP2 is multiplexed to. By default, it is
assigned to RC1 (CCP2MX = 1). If the Configuration bit
is cleared, CCP2 is multiplexed with RB3.
Changing the pin assignment of CCP2 does not auto-
matically change any requirements for configuring the
port pin. Users must always verify that the appropriate
TRIS register is configured correctly for CCP2
operation, regardless of where it is located.
Interaction
CCP2 PIN ASSIGNMENT
© 2009 Microchip Technology Inc.