PIC18LF2410T-I/SO Microchip Technology, PIC18LF2410T-I/SO Datasheet - Page 258

• Manufacturer Part Number: PIC18LF2410T-I/SO
• Description: IC MCU FLASH 8KX16 28SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF2410T-I/SO

• Core Processor: PIC
• Core Size: 8-Bit
• Speed: 40MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, HLVD, POR, PWM, WDT
• Number Of I /o: 25
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Ram Size: 768 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 10x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

PIC18F2X1X/4X1X
TABLE 23-1:
DS39636D-page 260
a
bbb
BSR
C, DC, Z, OV, N
d
dest
f
f
f
GIE
k
label
mm
*
*+
*-
+*
n
PC
PCL
PCH
PCLATH
PCLATU
PD
PRODH
PRODL
s
TBLPTR
TABLAT
TO
TOS
u
WDT
WREG
x
z
z
{
[text]
(text)
[expr]<n>
→
< >
∈
italics
s
d
s
d
}
Field
OPCODE FIELD DESCRIPTIONS
RAM access bit
a = 0: RAM location in Access RAM (BSR register is ignored)
a = 1: RAM bank is specified by BSR register
Bit address within an 8-bit file register (0 to 7).
Bank Select Register. Used to select the current RAM bank.
ALU Status bits: Carry, Digit Carry, Zero, Overflow, Negative.
Destination select bit
d = 0: store result in WREG
d = 1: store result in file register f
Destination: either the WREG register or the specified register file location.
8-bit Register file address (00h to FFh) or 2-bit FSR designator (0h to 3h).
12-bit Register file address (000h to FFFh). This is the source address.
12-bit Register file address (000h to FFFh). This is the destination address.
Global Interrupt Enable bit.
Literal field, constant data or label (may be either an 8-bit, 12-bit or a 20-bit value).
Label name.
The mode of the TBLPTR register for the table read and table write instructions.
Only used with table read and table write instructions:
The relative address (2’s complement number) for relative branch instructions or the direct address for
call/branch and return instructions.
Program Counter.
Program Counter Low Byte.
Program Counter High Byte.
Program Counter High Byte Latch.
Program Counter Upper Byte Latch.
Power-down bit.
Product of Multiply High Byte.
Product of Multiply Low Byte.
Fast Call/Return mode select bit
s = 0: do not update into/from shadow registers
s = 1: certain registers loaded into/from shadow registers (Fast mode)
21-bit Table Pointer (points to a Program Memory location).
8-bit Table Latch.
Time-out bit.
Top-of-Stack.
Unused or unchanged.
Watchdog Timer.
Working register (accumulator).
Don’t care (‘0’ or ‘1’). The assembler will generate code with x = 0. It is the recommended form of use for
compatibility with all Microchip software tools.
7-bit offset value for indirect addressing of register files (source).
7-bit offset value for indirect addressing of register files (destination).
Optional argument.
Indicates an indexed address.
The contents of text.
Specifies bit n of the register indicated by the pointer expr.
Assigned to.
Register bit field.
In the set of.
User defined term (font is Courier).
No change to register (such as TBLPTR with table reads and writes)
Post-Increment register (such as TBLPTR with table reads and writes)
Post-Decrement register (such as TBLPTR with table reads and writes)
Pre-Increment register (such as TBLPTR with table reads and writes)
Description
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