ATMEGA8A-PU Atmel, ATMEGA8A-PU Datasheet - Page 122

• Manufacturer Part Number: ATMEGA8A-PU
• Description: MCU AVR 8K FLASH 16MHZ 28-PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA8A-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (4K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-DIP (0.300", 7.62mm)
• Processor Series: ATMEGA8x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, TWI, USART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 6 Channel
• Package: 28PDIP
• Device Core: AVR
• Family Name: ATmega
• Maximum Speed: 16 MHz
• Operating Supply Voltage: 3.3|5 V
• Controller Family/series: AVR MEGA
• No. Of I/o's: 23
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 1KB
• Cpu Speed: 16MHz
• Rohs Compliant: Yes
• For Use With: ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

8159D–AVR–02/11
Table 17-3.
Table 17-4
mode.
Table 17-4.
Note:
Table 17-5
rect PWM mode.
Table 17-5.
Note:
• Bit 2:0 – CS22:0: Clock Select
The three clock select bits select the clock source to be used by the Timer/Counter, see
17-6.
COM21
COM21
COM21
0
0
1
1
0
0
1
1
0
0
1
1
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the Compare
1. A special case occurs when OCR2 equals TOP and COM21 is set. In this case, the Compare
Match is ignored, but the set or clear is done at BOTTOM. See
for more details.
Match is ignored, but the set or clear is done at TOP. See
115
shows the COM21:0 bit functionality when the WGM21:0 bits are set to phase cor-
shows the COM21:0 bit functionality when the WGM21:0 bits are set to fast PWM
COM20
Compare Output Mode, Non-PWM Mode
Compare Output Mode, Fast PWM Mode
Compare Output Mode, Phase Correct PWM Mode
0
1
0
1
for more details.
COM20
COM20
0
1
0
1
0
1
0
1
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on Compare Match when up-counting. Set OC2 on Compare Match
when downcounting.
Set OC2 on Compare Match when up-counting. Clear OC2 on Compare Match
when downcounting.
Description
Normal port operation, OC2 disconnected.
Reserved
Clear OC2 on Compare Match, set OC2 at BOTTOM,
(non-inverting mode)
Set OC2 on Compare Match, clear OC2 at BOTTOM,
(inverting mode)
Description
Normal port operation, OC2 disconnected.
Toggle OC2 on Compare Match
Clear OC2 on Compare Match
Set OC2 on Compare Match
(1)
“Phase Correct PWM Mode” on page
(1)
“Fast PWM Mode” on page 113
ATmega8A
Table
122