ATMEGA8A-PU Atmel, ATMEGA8A-PU Datasheet - Page 233

MCU AVR 8K FLASH 16MHZ 28-PDIP

ATMEGA8A-PU

Manufacturer Part Number
ATMEGA8A-PU
Description
MCU AVR 8K FLASH 16MHZ 28-PDIP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA8A-PU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
8KB (4K x 16)
Program Memory Type
FLASH
Eeprom Size
512 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-DIP (0.300", 7.62mm)
Processor Series
ATMEGA8x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
1 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
16 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 6 Channel
Package
28PDIP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
512Byte
Ram Memory Size
1KB
Cpu Speed
16MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA8A-PU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
8159D–AVR–02/11
While the lower bits in the address are mapped to words within the page, the higher bits address
the pages within the FLASH. This is illustrated in
than eight bits are required to address words in the page (pagesize < 256), the most significant
bit(s) in the address Low byte are used to address the page when performing a page write.
G. Load Address High byte
H. Program Page
I. Repeat B through H until the entire Flash is programmed or until all data has been
programmed.
J. End Page Programming
Table 24-11. Addressing the Flash which is Organized in Pages
Note:
1. Set XA1, XA0 to “00”. This enables address loading.
2. Set BS1 to “1”. This selects high address.
3. Set DATA = Address High byte (0x00 - 0xFF).
4. Give XTAL1 a positive pulse. This loads the address High byte.
1. Set BS1 = “0”
2. Give WR a negative pulse. This starts programming of the entire page of data.
3. Wait until RDY/BSY goes high. (See
1. Set XA1, XA0 to “10”. This enables command loading.
2. Set DATA to “0000 0000”. This is the command for No Operation.
3. Give XTAL1 a positive pulse. This loads the command, and the internal write signals
RDY/BSY goes low.
are reset.
1. PCPAGE and PCWORD are listed in
PROGRAM MEMORY
PROGRAM
COUNTER
PAGE
PAGE ADDRESS
WITHIN THE FLASH
PCMSB
PCPAGE
PAGEMSB
Figure 24-12
PCWORD
Table 24-5 on page
WORD ADDRESS
WITHIN A PAGE
Figure 24-11 on page
INSTRUCTION WORD
for signal waveforms)
PAGE
229.
(1)
233. Note that if less
ATmega8A
PCWORD[PAGEMSB:0]:
00
01
02
PAGEEND
233

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