ATMEGA324PA-PU Atmel, ATMEGA324PA-PU Datasheet - Page 43

MCU AVR 32KB FLASH 40PDIP

ATMEGA324PA-PU

Manufacturer Part Number
ATMEGA324PA-PU
Description
MCU AVR 32KB FLASH 40PDIP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA324PA-PU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
40-DIP (0.600", 15.24mm)
Controller Family/series
AVR MEGA
No. Of I/o's
32
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
9. Power Management and Sleep Modes
9.1
9.2
8272A–AVR–01/10
Overview
Sleep Modes
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving-
power. The AVR provides various sleep modes allowing the user to tailor the power
consumption to the application’s requirements.
When enabled, the Brown-out Detector (BOD) actively monitors the power supply voltage during
the sleep periods. To further save power, it is possible to disable the BOD in some sleep modes.
See
F i g u r e 8 - 1 o n p a g e 3 0
ATmega164A/164PA/324A/324PA/644A/644PA/1284/1284P, and their distribution. The figure is
helpful in selecting an appropriate sleep mode.
wake up sources and BOD disable ability.
Table 9-1.
Notes:
To enter any of the sleep modes, the SE bit in SMCR must be written to logic one and a SLEEP
instruction must be executed. The SM2, SM1, and SM0 bits in the SMCR Register select which
sleep mode will be activated by the SLEEP instruction. See
summary.
If an enabled interrupt occurs while the MCU is in a sleep mode, the MCU wakes up. The MCU
is then halted for four cycles in addition to the start-up time, executes the interrupt routine, and
resumes execution from the instruction following SLEEP. The contents of the Register File and
SRAM are unaltered when the device wakes up from sleep. If a reset occurs during sleep mode,
the MCU wakes up and executes from the Reset Vector.
164A/164PA/324A/324PA/644A/644PA/1284/1284P
Sleep Mode
Idle
ADCNRM
Power-down
Power-save
Standby
Extended
Standby
”BOD Disable
1. Only recommended with external crystal or resonator selected as clock source.
2. If Timer/Counter2 is running in asynchronous mode.
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
(1)
” on page 44
X
X
X
for more details.
p r e s e n t s t h e d i f f e r e n t c l o c k s y s t e m s i n t h e
X
X
X
X
(2)
Oscillators
X
X
X
X
Table 9-1
X
X
X
X
(2)
(2)
(2)
(2)
X
X
X
X
X
X
shows the different sleep modes, their
X
X
X
X
X
X
Wake-up Sources
X
Table 9-2 on page 48
X
X
X
(2)
X
X
X
X
X
X
X
X
X
X
X
for a
X
X
X
X
43

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