ATMEGA329V-8MU Atmel, ATMEGA329V-8MU Datasheet - Page 228

• Manufacturer Part Number: ATMEGA329V-8MU
• Description: IC AVR MCU 32K 8MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA329V-8MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

23. LCD Controller
23.1
23.1.1
23.1.2
228
Features
ATmega329/3290/649/6490
Overview
Definitions
The LCD Controller/driver is intended for monochrome passive liquid crystal display (LCD) with
up to four common terminals and up to 25/40 segment terminals.
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A simplified block diagram of the LCD Controller/Driver is shown in
placement of I/O pins, refer to
ATmega329/649” on page
An LCD consists of several segments (pixels or complete symbols) which can be visible or non
visible. A segment has two electrodes with liquid crystal between them. When a voltage above a
threshold voltage is applied across the liquid crystal, the segment becomes visible.
The voltage must alternate to avoid an electrophoresis effect in the liquid crystal, which
degrades the display. Hence the waveform across a segment must not have a DC-component.
The PRLCD bit in
LCD module.
Several terms are used when describing LCD. The definitions in
this document.
Table 23-1.
LCD
Segment
Common
Duty
Bias
Frame Rate
Display Capacity of 25/40 Segments and Four Common Terminals
Support Static, 1/2, 1/3 and 1/4 Duty
Support Static, 1/2, 1/3 Bias
On-chip LCD Power Supply, only One External Capacitor needed
Display Possible in Power-save Mode for Low Power Consumption
Software Selectable Low Power Waveform Capability
Flexible Selection of Frame Frequency
Software Selection between System Clock or an External Asynchronous Clock Source
Equal Source and Sink Capability to maximize LCD Life Time
LCD Interrupt Can be Used for Display Data Update or Wake-up from Sleep Mode
Segment and Common Pins not Needed for Driving the Display Can be Used as Ordinary I/O Pins
Latching of Display Data gives Full Freedom in Register Update
Definitions
A passive display panel with terminals leading directly to a segment
The least viewing element (pixel) which can be on or off
Denotes how many segments are connected to a segment terminal
1/(Number of common terminals on a actual LCD display)
1/(Number of voltage levels used driving a LCD display -1)
Number of times the LCD segments is energized per second.
“Power Reduction Register” on page 37
3.
“Pinout ATmega3290/6490” on page 2
must be written to zero to enable the
Table 23-1
Figure
are used throughout
23-1. For the actual
and
2552K–AVR–04/11
“Pinout