ATMEGA329V-8MU Atmel, ATMEGA329V-8MU Datasheet - Page 293

IC AVR MCU 32K 8MHZ 64-QFN

ATMEGA329V-8MU

Manufacturer Part Number
ATMEGA329V-8MU
Description
IC AVR MCU 32K 8MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA329V-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
27. Memory Programming
27.1
2552K–AVR–04/11
Program And Data Memory Lock Bits
The ATmega329/3290/649/6490 provides six Lock bits which can be left unprogrammed (“1”) or
can be programmed (“0”) to obtain the additional features listed in
only be erased to “1” with the Chip Erase command.
Table 27-1.
Note:
Table 27-2.
BLB12
BLB11
BLB02
BLB01
LB2
LB1
BLB0 Mode
LB Mode
Lock Bit Byte
1
2
3
1
2
3
4
Memory Lock Bits
1. “1” means unprogrammed, “0” means programmed
Lock Bit Byte
Lock Bit Protection Modes
BLB02
LB2
1
1
0
1
1
0
0
BLB01
LB1
Bit No
1
0
0
1
0
0
1
(1)
7
6
5
4
3
2
1
0
Protection Type
No memory lock features enabled.
Further programming of the Flash and EEPROM is
disabled in Parallel and Serial Programming mode. The
Fuse bits are locked in both Serial and Parallel
Programming mode.
Further programming and verification of the Flash and
EEPROM is disabled in Parallel and Serial Programming
mode. The Boot Lock bits and Fuse bits are locked in both
Serial and Parallel Programming mode.
No restrictions for SPM or LPM accessing the Application
section.
SPM is not allowed to write to the Application section.
SPM is not allowed to write to the Application section, and
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
LPM executing from the Boot Loader section is not
allowed to read from the Application section. If Interrupt
Vectors are placed in the Boot Loader section, interrupts
are disabled while executing from the Application section.
Description
Boot Lock bit
Boot Lock bit
Boot Lock bit
Boot Lock bit
Lock bit
Lock bit
(1)(2)
ATmega329/3290/649/6490
(1)
Default Value
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Table
(1)
27-2. The Lock bits can
293

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