ATMEGA329V-8MU Atmel, ATMEGA329V-8MU Datasheet - Page 310

IC AVR MCU 32K 8MHZ 64-QFN

ATMEGA329V-8MU

Manufacturer Part Number
ATMEGA329V-8MU
Description
IC AVR MCU 32K 8MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA329V-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
27.7.3
Table 27-15. Serial Programming Instruction Set
310
Instruction/Operation
Programming Enable
Chip Erase (Program Memory/EEPROM)
Poll RDY/BSY
Load Instructions
Load Extended Address byte
Load Program Memory Page, High byte
Load Program Memory Page, Low byte
Load EEPROM Memory Page (page access)
Read Instructions
Read Program Memory, High byte
Read Program Memory, Low byte
Read EEPROM Memory
ATmega329/3290/649/6490
Serial Programming Instruction set
8. Power-off sequence (if needed):
Table 27-14. Minimum Wait Delay Before Writing the Next Flash or EEPROM Location
Figure 27-11. Serial Programming Waveforms
Table 27-15
(1)
Symbol
t
t
t
t
WD_FUSE
WD_FLASH
WD_EEPROM
WD_ERASE
Set RESET to “1”.
Turn V
SERIAL DATA OUTPUT
SERIAL CLOCK INPUT
SERIAL DATA INPUT
CC
and
power off.
SAMPLE
Figure 27-12 on page 312
(MOSI)
(MISO)
(SCK)
Byte 1
$AC
$AC
$4D
$C1
$F0
$A0
$48
$40
$28
$20
MSB
MSB
0000 00aa
0000 0aaa
adr MSB
adr MSB
Byte 2
describes the Instruction set.
$53
$80
$00
$00
$00
$00
$00
/
Instruction Format
Minimum Wait Delay
4.5ms
4.5ms
9.0ms
9.0ms
Extended adr
0000 00aa
0000 0aaa
aaaa aaaa
adr LSB
adr LSB
adr LSB
adr LSB
Byte 3
$00
$00
$00
/
high data byte out
low data byte out
high data byte in
low data byte in
data byte out
data byte out
data byte in
LSB
LSB
2552K–AVR–04/11
Byte4
$00
$00
$00

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