ATMEGA329V-8MU Atmel, ATMEGA329V-8MU Datasheet - Page 35

• Manufacturer Part Number: ATMEGA329V-8MU
• Description: IC AVR MCU 32K 8MHZ 64-QFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA329V-8MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATMEGA32x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SPI, USART, USI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 54
• Number Of Timers: 3
• Operating Supply Voltage: 1.8 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 8 Channel
• For Use With: ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

9. Power Management and Sleep Modes
Table 9-1.
Notes:
2552K–AVR–04/11
Sleep
Mode
Idle
ADC
Noise
Reduction
Power-
down
Power-
save
Standby
1. Only recommended with external crystal or resonator selected as clock source.
2. If either LCD controller or Timer/Counter2 is running in asynchronous mode.
3. For INT0, only level interrupt
(1)
Active Clock Domains and Wake-up Sources in the Different Sleep Modes.
Active Clock Domains
Sleep modes enable the application to shut down unused modules in the MCU, thereby saving
power. The AVR provides various sleep modes allowing the user to tailor the power consump-
tion to the application’s requirements.
To enter any of the five sleep modes, the SE bit in SMCR must be written to logic one and a
SLEEP instruction must be executed, see
The SM2, SM1, and SM0 bits in the SMCR Register select which sleep mode (Idle, ADC Noise
Reduction, Power-down, Power-save, or Standby) will be activated by the SLEEP instruction.
See
sleep mode, the MCU wakes up. The MCU is then halted for four cycles in addition to the start-
up time, executes the interrupt routine, and resumes execution from the instruction following
SLEEP. The contents of the Register File and SRAM are unaltered when the device wakes up
from sleep. If a reset occurs during sleep mode, the MCU wakes up and executes from the
Reset Vector.
Figure 8-1 on page 26
and their distribution. The figure is helpful in selecting an appropriate sleep mode.
X
Table 9-1 on page 35
X
X
X
X
X
presents the different clock systems in the ATmega329/3290/649/6490,
Oscillators
X
X
X
for a summary. If an enabled interrupt occurs while the MCU is in a
X
X
X
(2)
(2)
(2)
X
X
X
X
“SMCR – Sleep Mode Control Register” on page
X
(3)
(3)
(3)
(3)
ATmega329/3290/649/6490
X
X
X
X
X
Wake-up Sources
X
X
X
(2)
X
X
X
(2)
X
X
X
X
X
39.
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