ATMEGA329V-8MU Atmel, ATMEGA329V-8MU Datasheet - Page 52

IC AVR MCU 32K 8MHZ 64-QFN

ATMEGA329V-8MU

Manufacturer Part Number
ATMEGA329V-8MU
Description
IC AVR MCU 32K 8MHZ 64-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA329V-8MU

Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
SPI, USART, USI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
3
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEMATJTAGICE2 - AVR ON-CHIP D-BUG SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
11.1.1
11.2
11.2.1
52
Register Description
ATmega329/3290/649/6490
Moving Interrupts Between Application and Boot Space
MCUCR – MCU Control Register
When the BOOTRST Fuse is programmed, the Boot section size set to 4K bytes and the IVSEL
bit in the MCUCR Register is set before any interrupts are enabled, the most typical and general
program setup for the Reset and Interrupt Vector Addresses is:
The MCU Control Register controls the placement of the Interrupt Vector table.
• Bit 1 – IVSEL: Interrupt Vector Select
When the IVSEL bit is cleared (zero), the Interrupt Vectors are placed at the start of the Flash
memory. When this bit is set (one), the Interrupt Vectors are moved to the beginning of the Boot
Loader section of the Flash. The actual address of the start of the Boot Flash Section is deter-
mined by the BOOTSZ Fuses. Refer to the section
Bit
0x35 (0x55)
Read/Write
Initial Value
0x0004
...
0x002C
;
.org 0x3800/0x7800
0x3800/0x7801RESET:ldir16,high(RAMEND); Main program start
0x3801/0x7801
0x3802/0x7802
0x3803/0x7803
0x3804/0x7804
0x3805/0x7805
Address Labels Code
;
.org 0x3800/0x7800
0x3800/0x7800
0x3802/0x7802
0x3804/0x7804
...
0x382C/0x782C
;
0x382E/0x782ERESET:ldir16,high(RAMEND); Main program start
0x382F/0x782F
0x3830/0x7830
0x3831/0x7831
0x3832/0x7832
0x3833/0x7833
JTD
R/W
7
0
jmp
...
jmp
out
ldi
out
sei
<instr>
jmp
jmp
jmp
...
jmp
out
ldi
out
sei
<instr>
R
6
0
PCINT0
...
SPM_RDY
SPH,r16
r16,low(RAMEND)
SPL,r16
RESET
EXT_INT0
PCINT0
...
SPM_RDY
SPH,r16
r16,low(RAMEND)
SPL,r16
R
5
0
xxx
xxx
PUD
R/W
4
0
; Store Program Memory Ready Handler
; Set Stack Pointer to top of RAM
; Set Stack Pointer to top of RAM
; PCINT0 Handler
;
; Store Program Memory Ready Handler
; Enable interrupts
Comments
; Reset handler
; IRQ0 Handler
; PCINT0 Handler
;
; Enable interrupts
R
3
0
“Boot Loader Support – Read-While-Write
R
2
0
IVSEL
R/W
1
0
IVCE
R/W
0
0
MCUCR
2552K–AVR–04/11

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