DSPIC30F4013-20E/PT Microchip Technology, DSPIC30F4013-20E/PT Datasheet

IC DSPIC MCU/DSP 48K 44TQFP

DSPIC30F4013-20E/PT

Manufacturer Part Number
DSPIC30F4013-20E/PT
Description
IC DSPIC MCU/DSP 48K 44TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4013-20E/PT

Program Memory Type
FLASH
Program Memory Size
48KB (16K x 24)
Package / Case
44-TQFP, 44-VQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
20 MIPS
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
Number Of I /o
30
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 13x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
30
Data Ram Size
2 KB
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Package
44TQFP
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
20 MHz
Operating Supply Voltage
3.3|5 V
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
13-chx12-bit
Number Of Timers
5
Core Frequency
20MHz
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
30
Flash Memory Size
48KB
Supply Voltage Range
2.5V To 5.5V
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
AC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F401320EPT

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F4013-20E/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
The dsPIC30F3014/4013 (Rev. A1) samples that you
have received were found to conform to the
specifications and functionality described in the
following documents:
• DS70157 – “dsPIC30F/33F Programmer’s
• DS70138 – “dsPIC30F3014/4013 Data Sheet”
• DS70046 – “dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the specific devices listed
below:
• dsPIC30F3014
• dsPIC30F4013
These devices may be identified by the following
message that appears in the MPLAB
Window under MPLAB IDE, when a “Reset and
Connect” operation is performed within MPLAB IDE:
Setting Vdd source to target
Target Device dsPIC30F4013 found,
revision = 0x1001
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready
The errata described in this section will be addressed
in
dsPIC30F4013 devices.
Silicon Errata Summary
The following list summarizes the errata described in
this document:
1.
2.
3.
© 2008 Microchip Technology Inc.
Reference Manual”
MAC Class Instructions with ±4 Address
Modification
Sequential MAC instructions, which prefetch data
from Y data space using ±4 address modification,
will cause an address error trap.
Decimal Adjust Instruction
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>).
PSV Operations Using SR
In certain instructions, fetching one of the
operands from program memory using Program
Space Visibility (PSV) will corrupt specific bits in
the STATUS Register, SR.
future
revisions
dsPIC30F3014/4013 Rev. A1 Silicon Errata
of
dsPIC30F3014
®
ICD 2 Output
dsPIC30F3014/4013
and
4.
5.
6.
7.
8.
9.
10. Output Compare
11. Special Function Registers
12. 4x PLL Operation
13. The data pin (SDA) on the I
14. INT0, ADC and Sleep Mode
Sequential Interrupts
Sequential interrupts after modifying the CPU IPL,
interrupt IPL, interrupt enable or interrupt flag may
cause an address error trap.
DISI Instruction
The DISI instruction will not disable interrupts if a
DISI instruction is executed in the same
instruction
decrements to zero.
Early Termination of Nested DO Loops
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT (CORCON<11>) bit will produce unexpected
results.
32 kHz Low-Power (LP) Oscillator
The LP oscillator does not function when the
device is placed in Sleep mode.
Data Converter Interface (DCI)
Once enabled, if the DCI module is subsequently
disabled by the application, the module does not
release the ownership of the COFS, CSCK, CSDI
and CSDO pins to the associated port functions
(RB9, RB10, RB11 and RB12).
Output Compare Module in PWM Mode
Output compare will produce a glitch when
loading 0% duty cycle in PWM mode. It will also
miss the next compare after the glitch.
The output compare module will produce a glitch
on the output when an I/O pin is initially set high
and the module is configured to drive the pin low at
a specified time.
Writes to certain unimplemented address locations
can affect I/O Port register values.
The 4x PLL mode of operation may not function
correctly for certain input frequencies.
not function unless the LATF<2> bit is low.
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPI
bits are non-zero.
cycle
that
the
2
C™ module does
DS80228K-page 1
DISI
counter

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DSPIC30F4013-20E/PT Summary of contents

Page 1

... These devices may be identified by the following message that appears in the MPLAB Window under MPLAB IDE, when a “Reset and Connect” operation is performed within MPLAB IDE: Setting Vdd source to target Target Device dsPIC30F4013 found, revision = 0x1001 ...Reading ICD Product ID Running ICD Self Test ...Passed ...

Page 2

... SDA and SCL pins, causing a false communication start in a single-master configuration or a bus collision in a multi-master configuration. The following sections describe the errata and work around to these errata, where they may apply. © 2008 Microchip Technology Inc. ® DSC ...

Page 3

... Adding an accumulator write back (a dummy write back if needed) to either of the MAC class instructions not use the + = address modification not prefetch data from Y data space. © 2008 Microchip Technology Inc. dsPIC30F3014/4013 2. Module: CPU – Instruction DAW.b The Decimal Adjust instruction, DAW.b, may improperly clear the Carry bit, C (SR< ...

Page 4

... Result in W4 (3) SR<1:0> bits , Result in W2 (3) SR<1:0> bits (4) SR<15:10> bits CORRECT RESULTS ;Load PSVPAG register ;Enable PSV ;Set up W1 for ;indirect PSV access ;from 0x000200 ;works ok ;Load W2 with data ;from program memory ;Carry flag and W4 ;results are ok! © 2008 Microchip Technology Inc. ...

Page 5

... DISI_PROTECT(X) {\ __asm__ volatile (“DISI #0x1FFF”);\ X; \ DISICNT = 0; } DISI_PROTECT(SRbits.IPL = 0x5); © 2008 Microchip Technology Inc. dsPIC30F3014/4013 Work around The user may disable interrupt nesting or execute a DISI instruction before modifying the CPU IPL or Interrupt 1 setting. A minimum DISI value required if the DISI is executed immediately before the CPU IPL or Interrupt 1 is modified, as shown in Example 4 ...

Page 6

... After disabling the DCI module by clearing the DCIEN bit, the application should further set the DCI Module Disable bit, DCIMD (PMD1<8>). The port functions associated with the DCI module (RB9, RB10, RB11 and RB12) may now be used. © 2008 Microchip Technology Inc. ...

Page 7

... PORTE will be modified by a write to address 0x0DA PORTF will be modified by a write to address 0x0E0 Work around User software should avoid writing to the unimplemented locations listed above. © 2008 Microchip Technology Inc. dsPIC30F3014/4013 12. Module: 4x PLL Operation When the 4x PLL mode of operation is selected, . ...

Page 8

... GotoSleep( ) function call. This ensures that the device continues executing the correct code sequence after waking up from Sleep mode. Example 8 demonstrates described above would apply to a dsPIC30F3014 device. the function call would be following the or _GotoSleep the work around © 2008 Microchip Technology Inc. ...

Page 9

... Note: The above work around is recommended for users for whom application hardware changes are not possible. © 2008 Microchip Technology Inc. dsPIC30F3014/4013 ; Ensure flag is reset ; Return from Interrupt Service Routine Work around 3: Instead of executing a PWRSAV #0 instruction to ...

Page 10

... If the D_A flag and the I2COV flag are both set, a valid data byte was received and a previous valid data byte was lost. It will be necessary to code for handling this overflow condition. © 2008 Microchip Technology Inc slave interrupt 2 C nodes. ...

Page 11

... Clock Failure Status bit (OSCCON<3>). If this bit is clear, return from the trap service routine immediately and continue program execution. © 2008 Microchip Technology Inc. dsPIC30F3014/4013 23. Module: PSV Operations An address error trap occurs in certain addressing modes when accessing the first four bytes of an PSV page ...

Page 12

... For example, if the SDA and SCL pins are shared with the UART and SPI pins, and the UART has higher precedence on the port latch pin. DS80228K-page module is that have 2 C © 2008 Microchip Technology Inc. ...

Page 13

... C), and 23 (Timer). Removed silicon issue 13 (Using OSC2/RC15 pin for Digital I/O). Revision K (9/2008) 2 Replaced issues 19 and with issue 26 (I Added silicon issues 22 (PLL Lock Status Bit), 23 (PSV 2 Operations) and 24-26 (I C). © 2008 Microchip Technology Inc. dsPIC30F3014/4013 2 C), and 21 (I/O 2 C). DS80228K-page 13 ...

Page 14

... NOTES: DS80228K-page 14 © 2008 Microchip Technology Inc. ...

Page 15

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 16

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

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