DSPIC30F4013-20E/PT Microchip Technology, DSPIC30F4013-20E/PT Datasheet - Page 26

• Manufacturer Part Number: DSPIC30F4013-20E/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4013-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: AC'97, Brown-out Detect/Reset, I²S, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 13x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Operating Supply Voltage: 3.3|5 V
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 13-chx12-bit
• Number Of Timers: 5
• Core Frequency: 20MHz
• Embedded Interface Type: CAN, I2C, SPI, UART
• No. Of I/o's: 30
• Flash Memory Size: 48KB
• Supply Voltage Range: 2.5V To 5.5V
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: AC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401320EPT

8.5.3
The READP command instructs the programming
executive to read N 24-bit words of code memory
starting
Addr_MSB and Addr_LS. This command can only be
used to read 24-bit data. All data returned in response
to this command uses the packed data format
described in
Expected Response (2 + 3 * N/2 words for N even):
0x1200
2 + 3 * N/2
Least significant program memory word 1
...
Least significant data word N
Expected Response (4 + 3 * (N – 1)/2 words for N
odd):
0x1200
4 + 3 * (N – 1)/2
Least significant program memory word 1
...
MSB of program memory word N (zero padded)
DS70102K-page 26
15
Opcode
Length
N
Reserved
Addr_MSB
Addr_LS
Note:
Opcode
Field
Reserved
from
12 11
READP COMMAND
Reading unimplemented memory will
cause the programming executive to
reset.
Section 8.3 “Packed Data
0x2
0x4
Number of 24-bit instructions to read
(max of 32768)
0x0
MSB of 24-bit source address
LS 16 bits of 24-bit source address
the
24-bit address
Addr_LS
8 7
N
Description
Length
Addr_MSB
specified
Format”.
by
0
8.5.4
The PROGD command instructs the programming
executive to program one row of data EEPROM. The
data to be programmed is specified by the 16 data
words (D_1, D_2,..., D_16) and is programmed to the
destination address specified by Addr_MSB and
Addr_LSB. The destination address should be a
multiple of 0x20.
Once the row of data EEPROM has been programmed,
the programming executive verifies the programmed
data against the data in the command.
Expected Response (2 words):
0x1400
0x0002
15
Opcode
Length
Reserved
Addr_MSB
Addr_LS
D_1
D_2
...
D_16
Note:
Opcode
Field
Reserved
12 11
PROGD COMMAND
Refer to
information.
0x4
0x13
0x0
MSB of 24-bit destination address
LS 16 bits of 24-bit destination
address
16-bit data word 1
16-bit data word 2
16-bit data words 3 through 15
16-bit data word 16
Table 5-3
Addr_LS
© 2010 Microchip Technology Inc.
D_16
D_1
D_2
...
8 7
Description
for data EEPROM size
Length
Addr_MSB
0