PIC16LC926-I/PT Microchip Technology, PIC16LC926-I/PT Datasheet

IC MCU CMOS 20MHZ 8K W/LCD64TQFP

PIC16LC926-I/PT

Manufacturer Part Number
PIC16LC926-I/PT
Description
IC MCU CMOS 20MHZ 8K W/LCD64TQFP
Manufacturer
Microchip Technology
Series
PIC® 16Cr
Datasheets

Specifications of PIC16LC926-I/PT

Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
20MHz
Connectivity
I²C, SPI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Type
OTP
Ram Size
336 x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 5x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TFQFP
Controller Family/series
PIC16C
No. Of I/o's
25
Ram Memory Size
336Byte
Cpu Speed
20MHz
No. Of Timers
3
Interface
I2C, SPI
Embedded Interface Type
I2C, SPI
Rohs Compliant
Yes
Processor Series
PIC16LC
Core
PIC
Data Bus Width
8 bit
Data Ram Size
336 B
Interface Type
I2C, SPI
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
25
Number Of Timers
1 x 16 bit
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734
Development Tools By Supplier
ICE2000
Minimum Operating Temperature
- 40 C
On-chip Adc
5 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
PIC16LC926-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
Part Number:
PIC16LC926-I/PT
Manufacturer:
MIC
Quantity:
20 000
The PIC
anomalous behavior in their Synchronous Serial Port
(SSP) modules, as described in this document. They
otherwise conform functionally to the descriptions pro-
vided in their respective Device Data Sheets and Ref-
erence Manuals, as amended by silicon release errata
for particular devices.
Users are encouraged to review the latest device data
sheets and errata available for additional information
concerning an individual device. These documents
may be obtained directly from the Microchip corporate
web site, at www.microchip.com.
Silicon Errata
These issues are expected to be resolved in future
silicon revisions of the designated parts.
The silicon issues identified in this “Silicon Errata” section
affect all silicon revisions of the following devices:
© 2007 Microchip Technology Inc.
• PIC14000
• PIC16C62
• PIC16C62A
• PIC16C62B
• PIC16C63
• PIC16C63A
• PIC16C64
• PIC16C64A
• PIC16C65
• PIC16C65A
• PIC16C65B
• PIC16C66
• PIC16C67
• PIC16C717
• PIC16C72
• PIC16C72A
• PIC16C73
• PIC16C73A
• PIC16C73B
• PIC16C74
• PIC16C74A
• PIC16C74B
• PIC16C76
• PIC16C77
®
microcontrollers you have received all exhibit
SSP Module Silicon/Data Sheet Errata
• PIC16C923
• PIC16C924
• PIC16C925
• PIC16C926
• PIC16CR62
• PIC16CR63
• PIC16CR64
• PIC16CR65
• PIC16CR72
• PIC16CR72A
• PIC16F72
• PIC16F73
• PIC16F74
• PIC16F76
• PIC16F77
• PIC16F87
• PIC16F88
• PIC16F818
• PIC16F819
• PIC18F2331
• PIC18F2431
• PIC18F4331
• PIC18F4431
SSP MODULE
1. Module: I
In its current implementation, the module may fail
to correctly recognize certain Repeated Start
conditions. For this discussion, a Repeated Start is
defined as a Start condition presented to the bus
after an initial valid Start condition has been recog-
nized and the Start status bit (SSPSTAT<3>) has
been set and before a valid Stop condition is
received.
If a Repeated Start is not recognized, a loss of
synchronization between the Master and Slave
may occur; the condition may continue until the
module is reset. A NACK condition, generated by
the Slave for any reason, will not reset the module.
This failure has been observed only under two
circumstances:
• A Repeated Start occurs within the frame of a
• A Repeated Start condition occurs between two
Work around
A time-out routine should be used to monitor the
module’s operation. The timer is enabled upon the
receipt of a valid Start condition; if a time-out
occurs, the module is reset. The length of the time-
out period will vary from application to application
and will need to be determined by the user.
Two methods are suggested to reset the module:
1. Change the mode of the module to something
2. Disable the module by clearing the SSPEN bit
Other methods may be available.
data or address byte. The unexpected Start
condition may be erroneously interpreted as a
data bit, provided that the required conditions
for setup and hold times are met.
back-to-back slave address matches in the
same Slave, with the R/W bit set to Read (= 1)
in both cases. (This circumstance is regarded
as being unlikely in normal operation.)
other than the desired mode by changing the set-
tings of bits, SSPM3:SSPM0 (SSPCON<3:0>);
then, change the bits back to the desired
configuration.
(SSPCON<5>); then, re-enable the module by
setting the bit.
2
C™ (Slave Mode)
DS80132F-page 1

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PIC16LC926-I/PT Summary of contents

Page 1

... PIC16C74A • PIC18F2431 • PIC16C74B • PIC18F4331 • PIC16C76 • PIC18F4431 • PIC16C77 © 2007 Microchip Technology Inc. SSP MODULE 2 1. Module: I C™ (Slave Mode) In its current implementation, the module may fail to correctly recognize certain Repeated Start conditions. For this discussion, a Repeated Start is ...

Page 2

... This foregoing text should be added to the appropriate subsections of the “SSP Module” chapter, entitled “SPI Mode” and read in context with any discussions of SPI Slave mode. In the case of DS30234D, the text applies to both implementations of SPI mode, as described in Sections 11.2 and 11. © 2007 Microchip Technology Inc. ...

Page 3

... B’11111001’ ; Sets <2:1> as output, but will not alter other bits ; User can use their own logic here, such as IORLW, XORLW and ANDLW MOVWF TRISC © 2007 Microchip Technology Inc. SSP MODULE 2 The description of the I C pins related to the TRIS bits is clarified. To ensure proper communication ...

Page 4

... Added data sheet clarification 3 (SSP – I Revision E Document (7/2006): Removed silicon issue 2 (SSP – SPI Slave Mode). Revision F Document (2/2007): Added four devices to list of devices affected by the silicon errata and clarified the related language. DS80132F-page Mode). © 2007 Microchip Technology Inc. ...

Page 5

... Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 6

... Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2007 Microchip Technology Inc. EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 ...

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