DSPIC30F4011-20E/PT Microchip Technology, DSPIC30F4011-20E/PT Datasheet - Page 210

• Manufacturer Part Number: DSPIC30F4011-20E/PT
• Description: IC DSPIC MCU/DSP 48K 44TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F4011-20E/PT

• Program Memory Type: FLASH
• Program Memory Size: 48KB (16K x 24)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 20 MIPS
• Connectivity: CAN, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 30
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.5 V ~ 5.5 V
• Data Converters: A/D 9x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 30
• Data Ram Size: 2 KB
• Operating Supply Voltage: 2.5 V to 5.5 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Data Rom Size: 1024 B
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
• Minimum Operating Temperature: - 40 C
• Package: 44TQFP
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 20 MHz
• Interface Type: CAN/I2C/SPI/UART
• On-chip Adc: 9-chx10-bit
• Number Of Timers: 5
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFP
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: DSPIC30F401120EPT

dsPIC30F4011/4012
I
TABLE 24-36: I
DS70135G-page 210
AC CHARACTERISTICS
IM10
IM11
IM20
IM21
IM25
IM26
IM30
IM31
IM33
IM34
IM40
IM45
IM50
Note 1:
Param
No.
2:
T
T
T
T
T
T
T
T
T
T
T
T
C
Symbol
SU
SU
SU
AA
LO
HI
F
R
HD
HD
HD
BF
B
BRG is the value of the I
in the “dsPIC30F Family Reference Manual” (DS70046).
Maximum pin capacitance = 10 pF for all I
:
:
SCL
:
SCL
:
:
:
:
:
:
SCL
:
:
:
SCL
DAT
STA
STO
SDA
SCL
DAT
STA
STO
2
Clock Low Time 100 kHz mode
Clock High Time 100 kHz mode
SDA and SCL
Fall Time
SDA and SCL
Rise Time
Data Input
Setup Time
Data Input
Hold Time
Start Condition
Setup Time
Start Condition
Hold Time
Stop Condition
Setup Time
Stop Condition
Hold Time
Output Valid
From Clock
Bus Free Time
Bus Capacitive Loading
C™ BUS DATA TIMING REQUIREMENTS (MASTER MODE)
Characteristic
2
C Baud Rate Generator. Refer to Section 21. “Inter-Integrated Circuit (I
400 kHz mode
1 MHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
100 kHz mode
400 kHz mode
1 MHz mode
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
(2)
2
C pins (for 1 MHz mode only).
Standard Operating Conditions: 2.5V to 5.5V
(unless otherwise stated)
Operating temperature
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
T
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
CY
20 + 0.1 C
20 + 0.1 C
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
/2 (BRG + 1)
Min
250
100
4.7
1.3
—
—
—
—
—
—
—
—
—
—
—
0
0
(1)
B
B
1000
3500
1000
Max
300
300
100
300
300
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
-40°C ≤ T
-40°C ≤ T
Units
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
© 2010 Microchip Technology Inc.
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
μs
A
A
≤ +85°C for Industrial
≤ +125°C for Extended
C
from 10 to 400 pF
C
from 10 to 400 pF
Only relevant for
Repeated Start
condition
After this period, the
first clock pulse is
generated
Time the bus must be
free before a new
transmission can start
B
B
is specified to be
is specified to be
Conditions
2
C™)”