ATMEGA32U4-MU Atmel, ATMEGA32U4-MU Datasheet - Page 289

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ATMEGA32U4-MU

Manufacturer Part Number
ATMEGA32U4-MU
Description
MCU AVR 32K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32U4-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
EBI/I2S/SPI/TWI/USART/USB
On-chip Adc
12-chx10-bit
Number Of Timers
5
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA32U4-16MU
ATMEGA32U4-16MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
23. Analog Comparator
23.0.1
23.0.2
7766F–AVR–11/10
ADC Control and Status Register B – ADCSRB
Analog Comparator Control and Status Register – ACSR
The Analog Comparator compares the input values on the positive pin AIN+ and negative pin
AIN-. When the voltage on the positive pin AIN+ is higher than the voltage on the negative pin
AIN-, the Analog Comparator output, ACO, is set. The comparator’s output can be set to trigger
the Timer/Counter1 Input Capture function. In addition, the comparator can trigger a separate
interrupt, exclusive to the Analog Comparator. The user can select Interrupt triggering on com-
parator output rise, fall or toggle. A block diagram of the comparator and its surrounding logic is
shown in
Bandgap reference. AIN- can only be connected to the ADC multiplexer.
The Power Reduction ADC bit, PRADC, in
must be disabled by writing a logical zero to be able to use the ADC input MUX.
Figure 23-1. Analog Comparator Block Diagram
Notes:
• Bit 6 – ACME: Analog Comparator Multiplexer Enable
When this bit is written logic one and the ADC is switched off (ADEN in ADCSRA is zero), the
ADC multiplexer is connected to the negative input to the Analog Comparator. When this bit is
written logic zero, the Bandgap reference is connected to the negative input of the Analog Com-
parator
“Analog Comparator Multiplexed Input” on page
Bit
Read/Write
Initial Value
Bit
Read/Write
Initial Value
ADC MULTIPLEXER
(See “Internal Voltage Reference” on page
1. See
2. Refer to
Figure
REFERENCE
REFERENCE
ACME
ADEN
BANDGAP
BANDGAP
OUTPUT
log Comparator pin placement.
7
ADHSM
R
0
7
ACD
R/W
0
Table 23-2 on page
(1)
23-1. AIN+ can be connected either to the AIN0 (PE6) pin, or to the internal
ACBG
“Pinout ATmega16U4/ATmega32U4” on page 3
6
ACBG
R/W
0
6
ACME
R/W
0
5
ACO
R
N/A
AIN+
AIN-
5
MUX5
R
0
291.
4
ACI
R/W
0
4
R
0
“Power Reduction Register 0 - PRR0” on page 46
3
ACIE
0
R/W
3
ADTS3
R
0
291.
(2)
54.). For a detailed description of this bit, see
2
ACIC
R/W
0
2
ADTS2
R/W
0
and
1
ACIS1
R/W
0
1
ADTS1
R/W
0
ATmega16/32U4
Table 10-3 on page 72
0
ACIS0
R/W
0
0
ADTS0
R/W
0
ACSR
ADCSRB
for Ana-
289

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