ATMEGA32U4-MU Atmel, ATMEGA32U4-MU Datasheet - Page 428

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ATMEGA32U4-MU

Manufacturer Part Number
ATMEGA32U4-MU
Description
MCU AVR 32K FLASH 16MHZ 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA32U4-MU

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
I²C, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
26
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2.5K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
16 MHz
Operating Supply Voltage
3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
26
Interface Type
EBI/I2S/SPI/TWI/USART/USB
On-chip Adc
12-chx10-bit
Number Of Timers
5
For Use With
ATSTK524 - KIT STARTER ATMEGA32M1/MEGA32C1ATSTK600 - DEV KIT FOR AVR/AVR32ATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVRATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA32U4-16MU
ATMEGA32U4-16MU

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA32U4-MUR
Manufacturer:
UCC
Quantity:
1 001
iv
ATmega16/32U4
19 USART in SPI Mode ............................................................................. 214
20 2-wire Serial Interface .......................................................................... 223
21 USB controller ...................................................................................... 253
18.3Frame Formats ....................................................................................................190
18.4USART Initialization ............................................................................................192
18.5Data Transmission – The USART Transmitter ....................................................193
18.6Data Reception – The USART Receiver .............................................................195
18.7Asynchronous Data Reception ............................................................................199
18.8Multi-processor Communication Mode ................................................................202
18.9Hardware Flow Control ........................................................................................203
18.10USART Register Description .............................................................................205
18.11Examples of Baud Rate Setting ........................................................................209
19.1Overview .............................................................................................................214
19.2Clock Generation .................................................................................................214
19.3SPI Data Modes and Timing ...............................................................................215
19.4Frame Formats ....................................................................................................215
19.5Data Transfer ......................................................................................................217
19.6USART MSPIM Register Description ..................................................................219
19.7AVR USART MSPIM vs. AVR SPI ......................................................................221
20.1Features ..............................................................................................................223
20.22-wire Serial Interface Bus Definition ..................................................................223
20.3Data Transfer and Frame Format ........................................................................224
20.4Multi-master Bus Systems, Arbitration and Synchronization ...............................227
20.5Overview of the TWI Module ...............................................................................228
20.6TWI Register Description ....................................................................................231
20.7Using the TWI ......................................................................................................234
20.8Transmission Modes ...........................................................................................238
20.9Multi-master Systems and Arbitration ..................................................................251
21.1Features ..............................................................................................................253
21.2Block Diagram .....................................................................................................253
21.3Typical Application Implementation .....................................................................254
21.4Crystal-less operation ..........................................................................................256
21.5Design guidelines ................................................................................................256
21.6General Operating Modes ...................................................................................257
21.7Power modes ......................................................................................................259
7766F–AVR–11/10

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