ATMEGA644A-PU Atmel, ATMEGA644A-PU Datasheet - Page 113

• Manufacturer Part Number: ATMEGA644A-PU
• Description: IC MCU AVR 64K FLASH 40PDIP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA644A-PU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 32
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 40-DIP (0.600", 15.24mm)
• Processor Series: ATmega
• Core: AVR
• Data Bus Width: 8 bit
• Data Ram Size: 4 KB
• Interface Type: JTAG, TWI, SPI, USART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: Through Hole
• Minimum Operating Temperature: - 40 C
• Operating Temperature Range: - 40 C to + 85 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

15.2.1
8272A–AVR–01/10
Registers
Figure 15-1. 16-bit Timer/Counter Block Diagram
Note:
The Timer/Counter (TCNTn), Output Compare Registers (OCRnA/B/C), and Input Capture Reg-
ister (ICRn) are all 16-bit registers. Special procedures must be followed when accessing the 16-
bit registers. These procedures are described in the section
page
CPU access restrictions. Interrupt requests (abbreviated to Int.Req. in the figure) signals are all
visible in the Timer Interrupt Flag Register (TIFRn). All interrupts are individually masked with
the Timer Interrupt Mask Register (TIMSKn). TIFRn and TIMSKn are not shown in the figure.
The Timer/Counter can be clocked internally, via the prescaler, or by an external clock source on
the Tn pin. The Clock Select logic block controls which clock source and edge the Timer/Counter
uses to increment (or decrement) its value. The Timer/Counter is inactive when no clock source
is selected. The output from the Clock Select logic is referred to as the timer clock (clk
The double buffered Output Compare Registers (OCRnA/B/C) are compared with the
Timer/Counter value at all time. The result of the compare can be used by the Waveform Gener-
ator to generate a PWM or variable frequency output on the Output Compare pin (OCnA/B/C).
164A/164PA/324A/324PA/644A/644PA/1284/1284P
114. The Timer/Counter Control Registers (TCCRnA/B/C) are 8-bit registers and have no
Refer to
placement and description.
Figure 1-1 on page 2
Timer/Counter
TCCRnA
OCRnA
OCRnB
TCNTn
ICRn
=
=
Direction
Count
Clear
and
”Alternate Port Functions” on page 79
Control Logic
TOP
=
TCCRnB
Values
BOTTOM
Fixed
TOP
ICFn (Int.Req.)
(Note:)
clk
Detector
Edge
=
Tn
0
”Accessing 16-bit Registers” on
OCnA
(Int.Req.)
OCnB
(Int.Req.)
TOVn
(Int.Req.)
Clock Select
Generation
Generation
( From Prescaler )
Waveform
Waveform
Canceler
Detector
Noise
Edge
for Timer/Counter1 pin
Comparator Ouput )
( From Analog
T
OCnB
OCnA
ICPn
n
Tn
).
113