DSPIC33FJ128MC708A-I/PT Microchip Technology, DSPIC33FJ128MC708A-I/PT Datasheet - Page 190

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DSPIC33FJ128MC708A-I/PT

Manufacturer Part Number
DSPIC33FJ128MC708A-I/PT
Description
IC DSPIC MCU/DSP 128K 80-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC708A-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
80-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
69
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
69
Data Ram Size
16 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Package
80TQFP
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Interface Type
CAN/I2C/SPI/UART
On-chip Adc
36-chx10-bit|36-chx12-bit
Number Of Timers
9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

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dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 16-11: PxOVDCON: PWMx OVERRIDE CONTROL REGISTER
DS70594B-page 190
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-8
bit 7-0
POVD4H
POUT4H
R/W-1
R/W-0
POVDxH<4:1>:POVDxL<4:1>: PWM Output Override bits
1 = Output on PWMx I/O pin is controlled by the PWM generator
0 = Output on PWMx I/O pin is controlled by the value in the corresponding POUTxH:POUTxL bit
POUTxH<4:1>:POUTxL<4:1>: PWM Manual Output bits
1 = PWMx I/O pin is driven active when the corresponding POVDxH:POVDxL bit is cleared
0 = PWMx I/O pin is driven inactive when the corresponding POVDxH:POVDxL bit is cleared
POVD4L
POUT4L
R/W-1
R/W-0
W = Writable bit
‘1’ = Bit is set
POVD3H
POUT3H
R/W-1
R/W-0
POVD3L
POUT3L
R/W-1
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
POVD2H
POUT2H
R/W-1
R/W-0
POVD2L
POUT2L
R/W-1
R/W-0
 2009 Microchip Technology Inc.
x = Bit is unknown
POVD1H
POUT1H
R/W-1
R/W-0
POVD1L
POUT1L
R/W-1
R/W-0
bit 8
bit 0

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