ATXMEGA192D3-AU Atmel, ATXMEGA192D3-AU Datasheet - Page 14

MCU AVR 192K FLASH 64TQFP

ATXMEGA192D3-AU

Manufacturer Part Number
ATXMEGA192D3-AU
Description
MCU AVR 192K FLASH 64TQFP
Manufacturer
Atmel
Series
AVR® XMEGAr
Datasheets

Specifications of ATXMEGA192D3-AU

Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, IrDA, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
50
Program Memory Size
192KB (96K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Controller Family/series
ATXMEGA
No. Of I/o's
50
Eeprom Memory Size
2KB
Ram Memory Size
16KB
Cpu Speed
32MHz
Rohs Compliant
Yes
Processor Series
XMEGA
Core
AVR
Data Bus Width
8 bit, 16 bit
Data Ram Size
16 KB
Interface Type
SPI, TWI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
50
Number Of Timers
5
Operating Supply Voltage
2.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Minimum Operating Temperature
- 40 C
Operating Temperature Range
- 40 C to + 85 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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Company
Part Number
Manufacturer
Quantity
Price
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ATXMEGA192D3-AU
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CYPRESS
Quantity:
101
Part Number:
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7.7
8068T–AVR–12/10
ATxmega64A3
ATxmega128A3
ATxmega192A3
ATxmega256A3
ATxmega64A3
ATxmega128A3
ATxmega192A3
ATxmega256A3
Devices
Devices
Flash and EEPROM Page Size
128 KB + 8 KB
192 KB + 8 KB
256 KB + 8 KB
64 KB + 4 KB
Flash
Size
EEPROM
The Flash Program Memory and EEPROM data memory are organized in pages. The pages are
word accessible for the Flash and byte accessible for the EEPROM.
Table 7-2 on page 14
operations are performed on one page at a time, while reading the Flash is done one byte at a
time. For Flash access the Z-pointer (Z[m:n]) is used for addressing. The most significant bits in
the address (FPAGE) gives the page number and the least significant address bits (FWORD)
gives the word in the page.
Table 7-2.
Table 7-3 on page 14
EEEPROM write and erase operations can be performed one page or one byte at a time, while
reading the EEPROM is done one byte at a time. For EEPROM access the NVM Address Regis-
ter (ADDR[m:n]) is used for addressing. The most significant bits in the address (E2PAGE) gives
the page number and the least significant address bits (E2BYTE) gives the byte in the page.
Table 7-3.
Size
2 KB
2 KB
2 KB
4 KB
Page Size
(words)
128
256
256
256
Number of words and Pages in the Flash.
Number of bytes and Pages in the EEPROM.
Page Size
FWORD
(Bytes)
Z[7:1]
Z[8:1]
Z[8:1]
Z[8:1]
shows the Flash Program Memory organization. Flash write and erase
32
32
32
32
shows EEPROM memory organization for the XMEGA A3 devices.
FPAGE
Z[16:8]
Z[17:9]
Z[18:9]
Z[18:9]
ADDR[4:0]
ADDR[4:0]
ADDR[4:0]
ADDR[4:0]
E2BYTE
128K
192K
256K
Size
64K
Application
No of Pages
ADDR[10:5]
ADDR[10:5]
ADDR[10:5]
ADDR[11:5]
E2PAGE
256
256
384
512
Size
4 KB
8 KB
8 KB
8 KB
XMEGA A3
No of Pages
Boot
No of Pages
128
64
64
64
16
16
16
16
14

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