AT89C51RD2-SLSUM Atmel, AT89C51RD2-SLSUM Datasheet - Page 100

• Manufacturer Part Number: AT89C51RD2-SLSUM
• Description: IC 8051 MCU FLASH 64K 44PLCC
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51RD2-SLSUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-PLCC
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Package: 44PLCC
• Device Core: 80C51
• Family Name: 89C
• Maximum Speed: 40 MHz
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCUAT89STK-11 - KIT STARTER FOR AT89C51RX2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

24.6.4
Figure 24-4. Hardware conditions typical sequence during power-on.
100
AT89C51RD2/ED2
Bootloader Functionality
The bootloader can be activated by two means: Hardware conditions or regular boot process.
The Hardware conditions (EA = 1, PSEN = 0) during the Reset# falling edge force the on-chip
bootloader execution. This allows an application to be built that will normally execute the end
user’s code but can be manually forced into default ISP operation.
As PSEN is a an output port in normal operating mode after reset, user application should take
care to release PSEN after falling edge of reset signal. The hardware conditions are sampled at
reset signal falling edge, thus they can be released at any time when reset input is low.
To ensure correct microcontroller startup, the PSEN pin should not be tied to ground during
power-on (See
The on-chip bootloader boot process is shown
Table 24-6.
Hardware Conditions
BLJB
SBV
VCC
PSEN
RST
Bootloader Process Description
Figure
24-4).
Purpose
The Hardware Conditions force the bootloader execution whatever BLJB,
BSB and SBV values.
The Boot Loader Jump Bit forces the application execution.
BLJB = 0 => Bootloader execution
BLJB = 1 => Application execution
The BLJB is a fuse bit in the Hardware Byte.
It can be modified by hardware (programmer) or by software (API).
Note: The BLJB test is performed by hardware to prevent any program
execution.
The Software Boot Vector contains the high address of customer bootloader
stored in the application.
SBV = FCh (default value) if no customer bootloader in user Flash.
Note: The customer bootloader is called by JMP [SBV]00h instruction.
Figure
24-5.
4235K–8051–05/08