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PIC16LF877-04I/PT
PIC16LF877-04I/PT | |
|---|---|
| Manufacturer Part Number | PIC16LF877-04I/PT |
| Description | IC PIC MCU FLASH 8KX14 44TQFP |
| Manufacturer | Microchip Technology |
| Series | PIC® 16F |
| PIC16LF877-04I/PT datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
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Specifications of PIC16LF877-04I/PT | |||
|---|---|---|---|
| Core Size | 8-Bit | Program Memory Size | 14KB (8K x 14) |
| Core Processor | PIC | Speed | 4MHz |
| Connectivity | I²C, SPI, UART/USART | Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Number Of I /o | 33 | Program Memory Type | FLASH |
| Eeprom Size | 256 x 8 | Ram Size | 368 x 8 |
| Voltage - Supply (vcc/vdd) | 2 V ~ 5.5 V | Data Converters | A/D 8x10b |
| Oscillator Type | External | Operating Temperature | -40°C ~ 85°C |
| Package / Case | 44-TQFP, 44-VQFP | Controller Family/series | PIC16LF |
| No. Of I/o's | 33 | Eeprom Memory Size | 256Byte |
| Ram Memory Size | 368Byte | Cpu Speed | 4MHz |
| No. Of Timers | 3 | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
PrevNext
2.2.2
SPECIAL FUNCTION REGISTERS
The Special Function Registers are registers used by
the CPU and peripheral modules for controlling the
desired operation of the device. These registers are
implemented as static RAM. A list of these registers is
given in Table 2-1.
TABLE 2-1:
SPECIAL FUNCTION REGISTER SUMMARY
Address
Name
Bit 7
Bit 6
Bank 0
(3)
00h
INDF
Addressing this location uses contents of FSR to address data memory (not a physical register)
01h
TMR0
Timer0 Module Register
(3)
02h
PCL
Program Counter (PC) Least Significant Byte
(3)
03h
STATUS
IRP
RP1
(3)
04h
FSR
Indirect Data Memory Address Pointer
05h
PORTA
—
—
06h
PORTB
PORTB Data Latch when written: PORTB pins when read
07h
PORTC
PORTC Data Latch when written: PORTC pins when read
(4)
08h
PORTD
PORTD Data Latch when written: PORTD pins when read
(4)
09h
PORTE
—
—
(1,3)
0Ah
PCLATH
—
—
(3)
0Bh
INTCON
GIE
PEIE
(3)
0Ch
PIR1
PSPIF
ADIF
0Dh
PIR2
—
(5)
0Eh
TMR1L
Holding register for the Least Significant Byte of the 16-bit TMR1 Register
0Fh
TMR1H
Holding register for the Most Significant Byte of the 16-bit TMR1 Register
10h
T1CON
—
—
11h
TMR2
Timer2 Module Register
12h
T2CON
—
TOUTPS3 TOUTPS2 TOUTPS1
13h
SSPBUF
Synchronous Serial Port Receive Buffer/Transmit Register
14h
SSPCON
WCOL
SSPOV
15h
CCPR1L
Capture/Compare/PWM Register1 (LSB)
16h
CCPR1H
Capture/Compare/PWM Register1 (MSB)
17h
CCP1CON
—
—
18h
RCSTA
SPEN
RX9
19h
TXREG
USART Transmit Data Register
1Ah
RCREG
USART Receive Data Register
1Bh
CCPR2L
Capture/Compare/PWM Register2 (LSB)
1Ch
CCPR2H
Capture/Compare/PWM Register2 (MSB)
1Dh
CCP2CON
—
—
1Eh
ADRESH
A/D Result Register High Byte
1Fh
ADCON0
ADCS1
ADCS0
Legend:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as '0', r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: The upper byte of the program counter is not directly accessible. PCLATH is a holding register for the PC<12:8> whose
contents are transferred to the upper byte of the program counter.
2: Bits PSPIE and PSPIF are reserved on PIC16F873/876 devices; always maintain these bits clear.
3: These registers can be addressed from any bank.
4: PORTD, PORTE, TRISD, and TRISE are not physically implemented on PIC16F873/876 devices; read as ‘0’.
5: PIR2<6> and PIE2<6> are reserved on these devices; always maintain these bits clear.
2001 Microchip Technology Inc.
The Special Function Registers can be classified into
two sets: core (CPU) and peripheral. Those registers
associated with the core functions are described in
detail in this section. Those related to the operation of
the peripheral features are described in detail in the
peripheral features section.
Bit 5
Bit 4
Bit 3
Bit 2
RP0
TO
PD
Z
PORTA Data Latch when written: PORTA pins when read
—
—
—
RE2
—
Write Buffer for the upper 5 bits of the Program Counter
T0IE
INTE
RBIE
T0IF
RCIF
TXIF
SSPIF
CCP1IF
—
EEIF
BCLIF
—
T1CKPS1
T1CKPS0
T1OSCEN
T1SYNC
TOUTPS0
TMR2ON
SSPEN
CKP
SSPM3
SSPM2
CCP1X
CCP1Y
CCP1M3
CCP1M2
SREN
CREN
ADDEN
FERR
CCP2X
CCP2Y
CCP2M3
CCP2M2
CHS2
CHS1
CHS0
GO/DONE
PIC16F87X
Value on:
Details
Bit 1
Bit 0
POR,
on
BOR
page:
27
0000 0000
47
xxxx xxxx
26
0000 0000
DC
C
18
0001 1xxx
27
xxxx xxxx
29
--0x 0000
31
xxxx xxxx
33
xxxx xxxx
35
xxxx xxxx
RE1
RE0
36
---- -xxx
26
---0 0000
INTF
RBIF
20
0000 000x
TMR2IF
TMR1IF
22
0000 0000
—
CCP2IF
24
-r-0 0--0
52
xxxx xxxx
52
xxxx xxxx
TMR1CS
TMR1ON --00 0000
51
55
0000 0000
T2CKPS1 T2CKPS0 -000 0000
55
70, 73
xxxx xxxx
SSPM1
SSPM0
67
0000 0000
57
xxxx xxxx
57
xxxx xxxx
CCP1M1
CCP1M0
58
--00 0000
OERR
RX9D
96
0000 000x
99
0000 0000
101
0000 0000
57
xxxx xxxx
57
xxxx xxxx
CCP2M1
CCP2M0
58
--00 0000
116
xxxx xxxx
—
ADON
111
0000 00-0
DS30292C-page 15
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