IC PIC MCU FLASH 8KX14 44TQFP

 

PIC16LF877-04I/PT

Manufacturer Part NumberPIC16LF877-04I/PT
DescriptionIC PIC MCU FLASH 8KX14 44TQFP
ManufacturerMicrochip Technology
SeriesPIC® 16F
PIC16LF877-04I/PT datasheets

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Specifications of PIC16LF877-04I/PT

Core Size8-BitProgram Memory Size14KB (8K x 14)
Core ProcessorPICSpeed4MHz
ConnectivityI²C, SPI, UART/USARTPeripheralsBrown-out Detect/Reset, POR, PWM, WDT
Number Of I /o33Program Memory TypeFLASH
Eeprom Size256 x 8Ram Size368 x 8
Voltage - Supply (vcc/vdd)2 V ~ 5.5 VData ConvertersA/D 8x10b
Oscillator TypeExternalOperating Temperature-40°C ~ 85°C
Package / Case44-TQFP, 44-VQFPController Family/seriesPIC16LF
No. Of I/o's33Eeprom Memory Size256Byte
Ram Memory Size368ByteCpu Speed4MHz
No. Of Timers3Lead Free Status / RoHS StatusLead free / RoHS Compliant
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Page 23/218

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2.2.2.4
PIE1 Register
The PIE1 register contains the individual enable bits for
the peripheral interrupts.
REGISTER 2-4:
PIE1 REGISTER (ADDRESS 8Ch)
R/W-0
R/W-0
(1)
PSPIE
ADIE
bit 7
(1)
bit 7
PSPIE
: Parallel Slave Port Read/Write Interrupt Enable bit
1 = Enables the PSP read/write interrupt
0 = Disables the PSP read/write interrupt
bit 6
ADIE: A/D Converter Interrupt Enable bit
1 = Enables the A/D converter interrupt
0 = Disables the A/D converter interrupt
bit 5
RCIE: USART Receive Interrupt Enable bit
1 = Enables the USART receive interrupt
0 = Disables the USART receive interrupt
bit 4
TXIE: USART Transmit Interrupt Enable bit
1 = Enables the USART transmit interrupt
0 = Disables the USART transmit interrupt
bit 3
SSPIE: Synchronous Serial Port Interrupt Enable bit
1 = Enables the SSP interrupt
0 = Disables the SSP interrupt
bit 2
CCP1IE: CCP1 Interrupt Enable bit
1 = Enables the CCP1 interrupt
0 = Disables the CCP1 interrupt
bit 1
TMR2IE: TMR2 to PR2 Match Interrupt Enable bit
1 = Enables the TMR2 to PR2 match interrupt
0 = Disables the TMR2 to PR2 match interrupt
bit 0
TMR1IE: TMR1 Overflow Interrupt Enable bit
1 = Enables the TMR1 overflow interrupt
0 = Disables the TMR1 overflow interrupt
Note 1: PSPIE is reserved on PIC16F873/876 devices; always maintain this bit clear.
Legend:
R = Readable bit
- n = Value at POR
2001 Microchip Technology Inc.
Note:
Bit PEIE (INTCON<6>) must be set to
enable any peripheral interrupt.
R/W-0
R/W-0
R/W-0
RCIE
TXIE
SSPIE
CCP1IE
W = Writable bit
U = Unimplemented bit, read as ‘0’
’1’ = Bit is set
’0’ = Bit is cleared
PIC16F87X
R/W-0
R/W-0
R/W-0
TMR2IE
TMR1IE
bit 0
x = Bit is unknown
DS30292C-page 21