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PIC16LF877-04I/PT
PIC16LF877-04I/PT | |
|---|---|
| Manufacturer Part Number | PIC16LF877-04I/PT |
| Description | IC PIC MCU FLASH 8KX14 44TQFP |
| Manufacturer | Microchip Technology |
| Series | PIC® 16F |
| PIC16LF877-04I/PT datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
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Specifications of PIC16LF877-04I/PT | |||
|---|---|---|---|
| Core Size | 8-Bit | Program Memory Size | 14KB (8K x 14) |
| Core Processor | PIC | Speed | 4MHz |
| Connectivity | I²C, SPI, UART/USART | Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Number Of I /o | 33 | Program Memory Type | FLASH |
| Eeprom Size | 256 x 8 | Ram Size | 368 x 8 |
| Voltage - Supply (vcc/vdd) | 2 V ~ 5.5 V | Data Converters | A/D 8x10b |
| Oscillator Type | External | Operating Temperature | -40°C ~ 85°C |
| Package / Case | 44-TQFP, 44-VQFP | Controller Family/series | PIC16LF |
| No. Of I/o's | 33 | Eeprom Memory Size | 256Byte |
| Ram Memory Size | 368Byte | Cpu Speed | 4MHz |
| No. Of Timers | 3 | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
PrevNext
PIC16F87X
3.5
PORTE and TRISE Register
PORTE and TRISE are not implemented on the
PIC16F873 or PIC16F876.
PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6,
and RE2/CS/AN7) which are individually configureable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
The PORTE pins become the I/O control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is
set. In this mode, the user must make certain that the
TRISE<2:0> bits are set, and that the pins are configured
as digital inputs. Also ensure that ADCON1 is configured
for digital I/O. In this mode, the input buffers are TTL.
Register 3-1 shows the TRISE register, which also con-
trols the parallel slave port operation.
PORTE pins are multiplexed with analog inputs. When
selected for analog input, these pins will read as ’0’s.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
Note:
On a Power-on Reset, these pins are con-
figured as analog inputs, and read as ‘0’.
TABLE 3-9:
PORTE FUNCTIONS
Name
Bit#
Buffer Type
(1)
RE0/RD/AN5
bit0
ST/TTL
(1)
RE1/WR/AN6
bit1
ST/TTL
(1)
RE2/CS/AN7
bit2
ST/TTL
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1: Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
TABLE 3-10:
SUMMARY OF REGISTERS ASSOCIATED WITH PORTE
Address
Name
Bit 7
Bit 6
09h
PORTE
—
—
89h
TRISE
IBF
OBF
9Fh
ADCON1
ADFM
—
Legend: x = unknown, u = unchanged, - = unimplemented, read as ’0’. Shaded cells are not used by PORTE.
DS30292C-page 36
FIGURE 3-8:
Data
Bus
WR
Port
WR
TRIS
RD
TRIS
RD Port
Note 1: I/O pins have protection diodes to V
Function
I/O port pin or read control input in Parallel Slave Port mode or analog input:
RD
1 = Idle
0 = Read operation. Contents of PORTD register are output to PORTD
I/O pins (if chip selected)
I/O port pin or write control input in Parallel Slave Port mode or analog input:
WR
1 = Idle
0 = Write operation. Value of PORTD I/O pins is latched into PORTD
register (if chip selected)
I/O port pin or chip select control input in Parallel Slave Port mode or analog input:
CS
1 = Device is not selected
0 = Device is selected
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
—
—
—
RE2
IBOV
PSPMODE
—
PORTE Data Direction Bits
—
—
PCFG3
PCFG2
PCFG1
PORTE BLOCK DIAGRAM
(IN I/O PORT MODE)
(1)
I/O pin
Data Latch
D
Q
CK
TRIS Latch
D
Q
Schmitt
CK
Trigger
Input
Buffer
Q
D
EN
EN
and V
.
DD
SS
Value on
Value on:
Bit 0
all other
POR, BOR
RESETS
RE1
RE0
---- -xxx ---- -uuu
0000 -111 0000 -111
PCFG0 --0- 0000 --0- 0000
2001 Microchip Technology Inc.
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