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PIC16LF877-04I/PT
PIC16LF877-04I/PT | |
|---|---|
| Manufacturer Part Number | PIC16LF877-04I/PT |
| Description | IC PIC MCU FLASH 8KX14 44TQFP |
| Manufacturer | Microchip Technology |
| Series | PIC® 16F |
| PIC16LF877-04I/PT datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
- If you still have any questions - please contact us
×
Shipping terms
- Standard delivery time differs from 5-8 business days if the supplier is a local one to 12-14 days if the suplier is from overseas. If delivery time differs it's always mentioned in our quotation.
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Payment terms
- For new client payment term is payment in advance. At this moment we accept 3 payment methods: wire transfer, PayPal and Western Union. Credit card payment is under constrution and will be introduced soon. Escrow service is acceptable. Net terms for regular customers is not a problem. Working with us is totally safe for you.
- If you still have any questions - please contact us
Specifications of PIC16LF877-04I/PT | |||
|---|---|---|---|
| Core Size | 8-Bit | Program Memory Size | 14KB (8K x 14) |
| Core Processor | PIC | Speed | 4MHz |
| Connectivity | I²C, SPI, UART/USART | Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Number Of I /o | 33 | Program Memory Type | FLASH |
| Eeprom Size | 256 x 8 | Ram Size | 368 x 8 |
| Voltage - Supply (vcc/vdd) | 2 V ~ 5.5 V | Data Converters | A/D 8x10b |
| Oscillator Type | External | Operating Temperature | -40°C ~ 85°C |
| Package / Case | 44-TQFP, 44-VQFP | Controller Family/series | PIC16LF |
| No. Of I/o's | 33 | Eeprom Memory Size | 256Byte |
| Ram Memory Size | 368Byte | Cpu Speed | 4MHz |
| No. Of Timers | 3 | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
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PrevNext
PIC16F87X
2
FIGURE 9-7:
I
C WAVEFORMS FOR TRANSMISSION (7-BIT ADDRESS)
Receiving Address
SDA
A7
A6
A5
A4
A3
SCL
1
2
3
4
5
S
Data in
sampled
SSPIF
BF (SSPSTAT<0>)
CKP (SSPCON<4>)
9.2.2
GENERAL CALL ADDRESS
SUPPORT
2
The addressing procedure for the I
C bus is such that
the first byte after the START condition usually deter-
mines which device will be the slave addressed by the
master. The exception is the general call address, which
can address all devices. When this address is used, all
devices should, in theory, respond with an acknowledge.
The general call address is one of eight addresses
reserved for specific purposes by the I
consists of all 0’s with R/W = 0.
The general call address is recognized when the Gen-
eral Call Enable bit (GCEN) is enabled (SSPCON2<7>
is set). Following a START bit detect, 8 bits are shifted
into SSPSR and the address is compared against
SSPADD. It is also compared to the general call
address and fixed in hardware.
FIGURE 9-8:
SLAVE MODE GENERAL CALL ADDRESS SEQUENCE (7 OR 10-BIT MODE)
General Call Address
SDA
SCL
1
2
3
S
SSPIF
BF
(SSPSTAT<0>)
SSPOV
(SSPCON<6>)
GCEN
(SSPCON2<7>)
DS30292C-page 76
R/W = 1
ACK
A2
A1
D7
D6
6
7
8
9
1
2
SCL held low
while CPU
responds to SSPIF
Cleared in software
SSPBUF is written in software
Set bit after writing to SSPBUF
(the SSPBUF must be written to,
before the CKP bit can be set)
If the general call address matches, the SSPSR is
transferred to the SSPBUF, the BF flag is set (eighth
bit), and on the falling edge of the ninth bit (ACK bit),
the SSPIF flag is set.
When the interrupt is serviced, the source for the inter-
rupt can be checked by reading the contents of the
SSPBUF to determine if the address was device spe-
cific, or a general call address.
In 10-bit mode, the SSPADD is required to be updated
for the second half of the address to match, and the UA
2
C protocol. It
bit is set (SSPSTAT<1>). If the general call address is
sampled when GCEN is set, while the slave is config-
ured in 10-bit address mode, then the second half of
the address is not necessary, the UA bit will not be set,
and the slave will begin receiving data after the
Acknowledge (Figure 9-8).
Address is compared to General Call Address
after ACK, set interrupt flag
R/W = 0
ACK
D7
D6
4
5
6
7
8
9
1
2
Cleared in software
SSPBUF is read
R/W = 0
Transmitting Data
Not ACK
D5
D4
D3
D2
D1
D0
3
4
5
6
7
8
9
P
From SSP Interrupt
Service Routine
Receiving data
ACK
D5
D4
D3
D2
D1
D0
3
4
5
6
7
8
9
’0’
’1’
2001 Microchip Technology Inc.
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