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PIC16LF877-04I/PT
PIC16LF877-04I/PT | |
|---|---|
| Manufacturer Part Number | PIC16LF877-04I/PT |
| Description | IC PIC MCU FLASH 8KX14 44TQFP |
| Manufacturer | Microchip Technology |
| Series | PIC® 16F |
| PIC16LF877-04I/PT datasheets |
|
Availability: In stock
International delivery:
Warranty: 60 days
×
- We provide standard 60-days warranty for all parts. If warranty differs we always mention it beforehand. In case of return we cover shipping costs.
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Specifications of PIC16LF877-04I/PT | |||
|---|---|---|---|
| Core Size | 8-Bit | Program Memory Size | 14KB (8K x 14) |
| Core Processor | PIC | Speed | 4MHz |
| Connectivity | I²C, SPI, UART/USART | Peripherals | Brown-out Detect/Reset, POR, PWM, WDT |
| Number Of I /o | 33 | Program Memory Type | FLASH |
| Eeprom Size | 256 x 8 | Ram Size | 368 x 8 |
| Voltage - Supply (vcc/vdd) | 2 V ~ 5.5 V | Data Converters | A/D 8x10b |
| Oscillator Type | External | Operating Temperature | -40°C ~ 85°C |
| Package / Case | 44-TQFP, 44-VQFP | Controller Family/series | PIC16LF |
| No. Of I/o's | 33 | Eeprom Memory Size | 256Byte |
| Ram Memory Size | 368Byte | Cpu Speed | 4MHz |
| No. Of Timers | 3 | Lead Free Status / RoHS Status | Lead free / RoHS Compliant |
PrevNext
PIC16F87X
9.3
Connection Considerations for
2
I
C Bus
2
For standard-mode I
C bus devices, the values of
resistors R
and R
in Figure 9-27 depend on the fol-
p
s
lowing parameters:
• Supply voltage
• Bus capacitance
• Number of connected devices
(input current + leakage current)
The supply voltage limits the minimum value of resistor
R
, due to the specified minimum sink current of 3 mA at
p
V
max = 0.4V, for the specified output stages. For
OL
FIGURE 9-27:
SAMPLE DEVICE CONFIGURATION FOR I
R
SDA
SCL
2
Note: I
C devices with input levels related to V
connected.
DS30292C-page 94
example, with a supply voltage of V
V
max = 0.4V at 3 mA, R
OL
V
as a function of R
DD
desired noise margin of 0.1V
the maximum value of R
and used to improve ESD susceptibility.
The bus capacitance is the total capacitance of wire,
connections, and pins. This capacitance limits the max-
imum value of R
(Figure 9-27).
The SMP bit is the slew rate control enabled bit. This bit
is in the SSPSTAT register, and controls the slew rate
of the I/O pins when in I
2
C BUS
V
+ 10%
DD
DEVICE
R
p
p
R
R
s
s
must have one common supply line to which the pull-up resistor is also
DD
= 5V±10% and
DD
min = (5.5-0.4)/0.003 = 1.7 k
p
is shown in Figure 9-27. The
p
for the low level limits
DD
. Series resistors are optional
s
due to the specified rise time
p
2
C mode (master or slave).
C
=10 - 400 pF
b
2001 Microchip Technology Inc.
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