P89LPC936FA,529 NXP Semiconductors, P89LPC936FA,529 Datasheet

IC 80C51 MCU FLASH 16K 28-PLCC

P89LPC936FA,529

Manufacturer Part Number
P89LPC936FA,529
Description
IC 80C51 MCU FLASH 16K 28-PLCC
Manufacturer
NXP Semiconductors
Series
LPC900r
Datasheet

Specifications of P89LPC936FA,529

Program Memory Type
FLASH
Program Memory Size
16KB (16K x 8)
Package / Case
28-PLCC
Core Processor
8051
Core Size
8-Bit
Speed
18MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
26
Eeprom Size
512 x 8
Ram Size
768 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 8x8b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
P89LPC9x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
768 B
Interface Type
I2C/SPI/UART
Maximum Clock Frequency
18 MHz
Number Of Programmable I/os
26
Number Of Timers
2
Operating Supply Voltage
2.4 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 8-bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1014 - BOARD FOR LPC9XX TSSOP622-1008 - BOARD FOR LPC9103 10-HVSON622-1006 - SOCKET ADAPTER BOARDMCB900K - BOARD PROTOTYPE NXP 89LPC9EPM900K - EMULATOR/PROGRAMMER NXP P89LPC9568-1759 - EMULATOR DEBUGGER/PROGRMMR LPC9X568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
935278702529
P89LPC936FA-S
P89LPC936FA-S

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
P89LPC936FA,529
Manufacturer:
NXP Semiconductors
Quantity:
10 000
1. General description
2. Features and benefits
2.1 Principal features
The P89LPC933/934/935/936 is a single-chip microcontroller, available in low cost
packages, based on a high performance processor architecture that executes instructions
in two to four clocks, six times the rate of standard 80C51 devices. Many system-level
functions have been incorporated into the P89LPC933/934/935/936 in order to reduce
component count, board space, and system cost.
P89LPC933/934/935/936
8-bit microcontroller with accelerated two-clock 80C51 core
4 kB/8 kB/16 kB 3 V byte-erasable flash with 8-bit ADCs
Rev. 8 — 12 January 2011
4 kB/8 kB/16 kB byte-erasable flash code memory organized into 1 kB/2 kB sectors
and 64-byte pages. Single-byte erasing allows any byte(s) to be used as non-volatile
data storage.
256-byte RAM data memory. Both the P89LPC935 and P89LPC936 also include a
512-byte auxiliary on-chip RAM.
512-byte customer data EEPROM on chip allows serialization of devices, storage of
setup parameters, etc. (P89LPC935/936).
Dual 4-input multiplexed 8-bit A/D converters/DAC outputs (P89LPC935/936, single
A/D on P89LPC933/934).Two analog comparators with selectable inputs and
reference source.
Two 16-bit counter/timers (each may be configured to toggle a port output upon timer
overflow or to become a PWM output) and a 23-bit system timer that can also be used
as an RTC.
Enhanced UART with fractional baud rate generator, break detect, framing error
detection, and automatic address detection; 400 kHz byte-wide I
communication port and SPI communication port.
Capture/Compare Unit (CCU) provides PWM, input capture, and output compare
functions (P89LPC935/936).
High-accuracy internal RC oscillator option allows operation without external oscillator
components. The RC oscillator option is selectable and fine tunable.
2.4 V to 3.6 V V
driven to 5.5 V).
28-pin TSSOP, PLCC, and HVQFN packages with 23 I/O pins minimum and up to 26
I/O pins while using on-chip oscillator and reset options.
DD
operating range. I/O pins are 5 V tolerant (may be pulled up or
Product data sheet
2
C-bus

Related parts for P89LPC936FA,529

P89LPC936FA,529 Summary of contents

Page 1

P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core 4 kB/8 kB/ byte-erasable flash with 8-bit ADCs Rev. 8 — 12 January 2011 1. General description The P89LPC933/934/935/936 is a single-chip microcontroller, available in low cost packages, based ...

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... NXP Semiconductors 2.2 Additional features A high performance 80C51 CPU provides instruction cycle times of 111 ns to 222 ns for all instructions except multiply and divide when executing at 18 MHz. This is six times the performance of the standard 80C51 running at the same clock frequency. A lower clock frequency for the same performance results in power savings and reduced EMI ...

Page 3

... NXP Semiconductors 3. Product comparison overview Table 1 features please see Table 1. Device P89LPC933 P89LPC934 P89LPC935 P89LPC936 4. Ordering information Table 2. Type number P89LPC935FA P89LPC933HDH P89LPC933FDH P89LPC934FDH P89LPC935FDH P89LPC936FDH P89LPC935FHN 4.1 Ordering options Table 3. Type number P89LPC933HDH P89LPC933FDH P89LPC935FA P89LPC934FDH P89LPC935FDH P89LPC935FHN P89LPC936FDH P89LPC933_934_935_936 ...

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... NXP Semiconductors 5. Block diagram P89LPC933/934/935/936 P3[1:0] P2[7:0] P1[7:0] P0[7:0] X1 CRYSTAL OR RESONATOR X2 Fig 1. Block diagram P89LPC933_934_935_936 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core ACCELERATED 2-CLOCK 80C51 CPU 4 kb/8 kB/16 kB CODE FLASH internal bus 256-BYTE DATA RAM 512-BYTE AUXILIARY RAM ...

Page 5

... NXP Semiconductors 6. Pinning information 6.1 Pinning Fig 2. Fig 3. P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core P2.0/DAC0 1 2 P2.1 3 P0.0/CMP2/KBI0 4 P1.7 P1.6 5 P1.5/RST 6 P89LPC933HDH P89LPC933FDH 8 P3.1/XTAL1 P89LPC934FDH 9 P3.0/XTAL2/CLKOUT P1.4/INT1 10 P1.3/INT0/SDA 11 12 P1.2/T0/SCL 13 P2.2/MOSI 14 P2.3/MISO P89LPC933/934 TSSOP28 pin configuration P2 ...

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... NXP Semiconductors Fig 4. Fig 5. P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core 5 P1.6/OCB P1.5/RST P3.1/XTAL1 8 P89LPC935FA 9 P3.0/XTAL2/CLKOUT P1.4/INT1 10 P1.3/INT0/SDA 11 P89LPC935 PLCC28 pin configuration terminal 1 index area 1 P1.6/OCB 2 P1.5/RST P89LPC935FHN 4 P3.1/XTAL1 5 P3.0/XTAL2/CLKOUT 6 P1.4/INT1 7 P1.3/INT0/SDA Transparent top view P89LPC935 HVQFN28 pin configuration All information provided in this document is subject to legal disclaimers. Rev. 8 — ...

Page 7

... NXP Semiconductors 6.2 Pin description Table 4. Pin description Symbol Pin TSSOP28, HVQFN28 PLCC28 P0.0 to P0.7 P0.0/CMP2 KBI0/AD01 P0.1/CIN2B KBI1/AD10 P0.2/CIN2A KBI2/AD11 P0.3/CIN1B KBI3/AD12 P0.4/CIN1A KBI4/DAC1/ AD13 P0. CMPREF/ KBI5 P0.6/CMP1 KBI6 P0.7/T1 KBI7 P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core ...

Page 8

... NXP Semiconductors Table 4. Pin description …continued Symbol Pin TSSOP28, HVQFN28 PLCC28 P1.0 to P1.7 P1.0/TXD 18 14 P1.1/RXD 17 13 P1.2/T0/SCL 12 8 P1.3/INT0 SDA P1.4/INT1 10 6 P1.5/RST 6 2 P1.6/OCB 5 1 P1.7/OCC AD00 P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core ...

Page 9

... NXP Semiconductors Table 4. Pin description …continued Symbol Pin TSSOP28, HVQFN28 PLCC28 P2.0 to P2.7 P2.0/ICB DAC0/AD03 P2.1/OCD AD02 P2.2/MOSI 13 9 P2.3/MISO 14 10 P2.4/ P2. SPICLK P2.6/OCA 27 23 P2.7/ICA 28 24 P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O Port 2: Port 8-bit I/O port with a user-configurable output type ...

Page 10

... NXP Semiconductors Table 4. Pin description …continued Symbol Pin TSSOP28, HVQFN28 PLCC28 P3.0 to P3.1 P3.0/XTAL2 CLKOUT P3.1/XTAL1 [1] Input/output for P1.0 to P1.4, P1.6, P1.7. Input for P1.5. P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Type Description I/O Port 3: Port 2-bit I/O port with a user-configurable output type. ...

Page 11

... NXP Semiconductors 7. Logic symbols KBI0 KBI1 AD10 KBI2 AD11 KBI3 AD12 KBI4 DAC1 AD13 KBI5 KBI6 KBI7 CLKOUT Fig 6. P89LPC933/934 logic symbol KBI0 AD01 KBI1 AD10 KBI2 AD11 KBI3 AD12 DAC1 KBI4 AD13 KBI5 KBI6 KBI7 CLKOUT Fig 7. P89LPC935/936 logic symbol ...

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... NXP Semiconductors 8. Functional description Remark: Please refer to the P89LPC933/934/935/936 User manual for a more detailed functional description. 8.1 Special function registers Remark: SFR accesses are restricted in the following ways: • User must not attempt to access any SFR locations not defined. • Accesses to any defined SFR locations must be strictly for the functions for the SFRs. ...

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Table 5. Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H ADCON0 A/D control register 0 8EH ADCON1 A/D control register 1 97H ADINS A/D input select A3H ...

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Table 5. Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. FMADRL Program flash address low E6H FMCON Program flash control (Read) E4H Program flash control (Write) E4H FMDATA Program flash data E5H ...

Page 15

Table 5. Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. KBCON Keypad control register 94H KBMASK Keypad interrupt mask 86H register KBPATN Keypad pattern register 93H Bit address P0* Port 0 80H ...

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Table 5. Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. RTCH Real-time clock register high D2H RTCL Real-time clock register low D3H SADDR Serial port address register A9H SADEN Serial port address ...

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Table 5. Special function registers - P89LPC933/934 * indicates SFRs that are bit addressable. Name Description SFR addr. WDL Watchdog load C1H WFEED1 Watchdog feed 1 C2H WFEED2 Watchdog feed 2 C3H [1] Unimplemented bits in SFRs (labeled ’-’) are ...

Page 18

Table 6. Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. Bit address ACC* Accumulator E0H ADCON0 A/D control register 0 8EH ADCON1 A/D control register 1 97H ADINS A/D input select A3H ...

Page 19

Table 6. Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. CCCRB Capture compare B control EBH register CCCRC Capture compare C control ECH register CCCRD Capture compare D control EDH register CMP1 ...

Page 20

Table 6. Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. I2SCLL Serial clock generator/SCL DCH duty cycle register low 2 I2STAT I C status register D9H ICRAH Input capture A register high ...

Page 21

Table 6. Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. OCRCH Output compare C register FDH high OCRCL Output compare C register FCH low OCRDH Output compare D register FFH high OCRDL ...

Page 22

Table 6. Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. RSTSRC Reset source register DFH RTCCON Real-time clock control D1H RTCH Real-time clock register high D2H RTCL Real-time clock register low D3H ...

Page 23

Table 6. Special function registers - P89LPC935/936 * indicates SFRs that are bit addressable. Name Description SFR addr. TL2 CCU timer low CCH TMOD Timer 0 and 1 mode 89H TOR2H CCU reload register high CFH TOR2L CCU reload register ...

Page 24

... NXP Semiconductors 8.2 Enhanced CPU The P89LPC933/934/935/936 uses an enhanced 80C51 CPU which runs at six times the speed of standard 80C51 devices. A machine cycle consists of two CPU clock cycles, and most instructions execute in one or two machine cycles. 8.3 Clocks 8.3.1 Clock definitions The P89LPC933/934/935/936 device has several internal clocks as defined below: OSCCLK — ...

Page 25

... NXP Semiconductors external clock input on X1) and if the RTC is not using the crystal oscillator as its clock source. This allows external devices to synchronize to the P89LPC933/934/935/936. This output is enabled by the ENCLK bit in the TRIM register. The frequency of this clock output is in Idle mode, it may be turned off prior to entering Idle, saving additional power. ...

Page 26

... NXP Semiconductors XTAL1 XTAL2 (400 kHz +30 % −20 %) Fig 8. P89LPC933_934_935_936 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core HIGH FREQUENCY MEDIUM FREQUENCY LOW FREQUENCY RC RCCLK OSCILLATOR (7.3728 MHz ±1 %) WATCHDOG OSCILLATOR TIMER 0 AND 2 I TIMER 1 Block diagram of oscillator control All information provided in this document is subject to legal disclaimers. ...

Page 27

... NXP Semiconductors 8.7 CCLK wake-up delay The P89LPC933/934/935/936 has an internal wake-up timer that delays the clock until it stabilizes depending on the clock source used. If the clock source is any of the three crystal selections (low, medium and high frequencies) the delay is 992 OSCCLK cycles plus 60 μ ...

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... NXP Semiconductors • CODE code memory space, accessed as part of program execution and via the MOVC instruction. The P89LPC933/934/935/936 have 4 KB/8 kB/ on-chip Code memory. The P89LPC935/936 also has 512 bytes of on-chip data EEPROM that is accessed via SFRs (see 8.11 Data RAM arrangement The 768 bytes of on-chip RAM are organized as shown in Table 7 ...

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... NXP Semiconductors These external interrupts can be programmed to be level-triggered or edge-triggered by setting or clearing bit IT1 or IT0 in register TCON. In edge-triggered mode, if successive samples of the INTn pin show a HIGH in one cycle and a LOW in the next cycle, the interrupt request flag IEn in TCON is set, causing an interrupt request ...

Page 30

... NXP Semiconductors 8.13 I/O ports The P89LPC933/934/935/936 has four I/O ports: Port 0, Port 1, Port 2, and Port 3. Ports 0, 1 and 2 are 8-bit ports, and Port 2-bit port. The exact number of I/O pins available depends upon the clock and reset options chosen, as shown in Table 8 ...

Page 31

... NXP Semiconductors An open-drain port pin has a Schmitt trigger input that also has a glitch suppression circuit. 8.13.1.3 Input-only configuration The input-only port configuration has no output drivers Schmitt trigger input that also has a glitch suppression circuit. 8.13.1.4 Push-pull output configuration The push-pull output configuration has the same pull-down structure as both the open-drain and the quasi-bidirectional output modes, but provides a continuous strong pull-up when the port latch contains a logic 1 ...

Page 32

... NXP Semiconductors 8.14.1 Brownout detection The brownout detect function determines if the power supply voltage drops below a certain level. The default operation is for a brownout detection to cause a processor reset, however it may alternatively be configured to generate an interrupt. Brownout detection may be enabled or disabled in software. If brownout detection is enabled the brownout condition occurs when V ...

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... NXP Semiconductors 8.15.3 Total Power-down mode This is the same as Power-down mode except that the brownout detection circuitry and the voltage comparators are also disabled to conserve additional power. The internal RC oscillator is disabled unless both the RC oscillator has been selected as the system clock and the RTC is enabled ...

Page 34

... NXP Semiconductors 8.17 Timers/counters 0 and 1 The P89LPC933/934/935/936 has two general purpose counter/timers which are upward compatible with the standard 80C51 Timer 0 and Timer 1. Both can be configured to operate either as timers or event counter. An option to automatically toggle the T0 and/or T1 pins upon timer overflow has been added. ...

Page 35

... NXP Semiconductors not being used as the CPU clock. If the XTAL oscillator is used as the CPU clock, then the RTC will use CCLK as its clock source. Only power-on reset will reset the RTC and its associated SFRs to the default state. 8.19 CCU (P89LPC935/936) This unit features: • ...

Page 36

... NXP Semiconductors Capture Noise Filter bit. If set, the capture logic needs to see four consecutive samples of the same value in order to recognize an edge as a capture event. An event counter can be set to delay a capture by a number of capture events. 8.19.6 PWM operation PWM operation has two main modes, symmetrical and asymmetrical. ...

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... NXP Semiconductors 8.19.7 Alternating output mode In asymmetrical mode, the user can set up PWM channels A/B and C/D as alternating pairs for bridge drive control. In this mode the output of these PWM channels are alternately gated on every counter cycle. Fig 12. Alternate output mode 8.19.8 PLL operation The PWM module features a PLL that can be used to generate a CCUCLK frequency between 16 MHz and 32 MHz ...

Page 38

... NXP Semiconductors 8.19.9 CCU interrupts There are seven interrupt sources on the CCU which share a common interrupt vector. EA (IEN0.7) ECCU (IEN1.4) TOIE2 (TICR2.7) TOIF2 (TIFR2.7) TICIE2A (TICR2.0) TICF2A (TIFR2.0) TICIE2B (TICR2.1) TICF2B (TIFR2.1) TOCIE2A (TICR2.3) TOCF2A (TIFR2.3) TOCIE2B (TICR2.4) TOCF2B (TIFR2.4) TOCIE2C (TICR2.5) TOCF2C (TIFR2 ...

Page 39

... NXP Semiconductors 8.20.2 Mode 1 10 bits are transmitted (through TXD) or received (through RXD): a start bit (logic 0), 8 data bits (LSB first), and a stop bit (logic 1). When data is received, the stop bit is stored in RB8 in special function register SCON. The baud rate is variable and is determined by ...

Page 40

... NXP Semiconductors 8.20.7 Break detect Break detect is reported in the status register (SSTAT). A break is detected when 11 consecutive bits are sensed LOW. The break detect can be used to reset the device and force the device into ISP mode. 8.20.8 Double buffering The UART has a transmit double buffer that allows buffering of the next character to be written to SBUF while the first character is being transmitted ...

Page 41

... NXP Semiconductors 2 8.21 I C-bus serial interface 2 The I C-bus uses two wires (SDA and SCL) to transfer information between devices connected to the bus, and it has the following features: • Bidirectional data transfer between masters and slaves • Multi master bus (no central master) • ...

Page 42

... NXP Semiconductors P1.3/SDA P1.2/SCL Fig 16. I P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core P1.3 INPUT FILTER OUTPUT STAGE INPUT FILTER OUTPUT STAGE timer 1 overflow P1.2 I2CON I2SCLH I2SCLL status bus I2STAT 2 C-bus serial interface block diagram All information provided in this document is subject to legal disclaimers. Rev. 8 — ...

Page 43

... NXP Semiconductors 8.22 SPI The P89LPC933/934/935/936 provides another high-speed serial communication interface—the SPI interface. SPI is a full-duplex, high-speed, synchronous communication bus with two operation modes: Master mode and Slave mode Mbit/s can be supported in Master mode Mbit/s in Slave mode. It has a Transfer Completion Flag and Write Collision Flag Protection. ...

Page 44

... NXP Semiconductors 8.22.1 Typical SPI configurations Fig 18. SPI single master single slave configuration Fig 19. SPI dual device configuration, where either can be a master or a slave P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core master MISO 8-BIT SHIFT ...

Page 45

... NXP Semiconductors Fig 20. SPI single master multiple slaves configuration P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core master MISO 8-BIT SHIFT MOSI REGISTER SPICLK SPI CLOCK port GENERATOR port All information provided in this document is subject to legal disclaimers. ...

Page 46

... NXP Semiconductors 8.23 Analog comparators Two analog comparators are provided on the P89LPC933/934/935/936. Input and output options allow use of the comparators in a number of different configurations. Comparator operation is such that the output is a logic 1 (which may be read in a register and/or routed to a pin) when the positive input (one of two selectable pins) is greater than the negative input (selectable from a pin or an internal reference voltage) ...

Page 47

... NXP Semiconductors 8.23.2 Comparator interrupt Each comparator has an interrupt flag contained in its configuration register. This flag is set whenever the comparator output changes state. The flag may be polled by software or may be used to generate an interrupt. The two comparators use one common interrupt vector. If both comparators enable interrupts, after entering the interrupt service routine, the user needs to read the flags to determine which comparator caused the interrupt ...

Page 48

... NXP Semiconductors 8.25 Watchdog timer The watchdog timer causes a system reset when it underflows as a result of a failure to feed the timer prior to the timer reaching its terminal count. It consists of a programmable 12-bit prescaler, and an 8-bit down counter. The down counter is decremented by a tap taken from the prescaler ...

Page 49

... NXP Semiconductors 8.27 Data EEPROM (P89LPC935/936) The P89LPC935/936 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is SFR based, byte readable, byte writable, and erasable (via row fill and sector fill). The user can read, write and fill the memory via SFRs and one interrupt. This Data EEPROM provides 100,000 minimum erase/program cycles for each byte. • ...

Page 50

... NXP Semiconductors 8.28.3 Flash organization The program memory consists of eight 2 kB sectors on the P89LPC936 device, eight 1 kB sectors on the P89LPC934/935 devices, and four 1 kB sectors on the P89LPC933 device. Each sector can be further divided into 64-byte pages. In addition to sector erase, page erase, and byte erase, a 64-byte page register is included which allows from bytes of a given page to be programmed at the same time, substantially reducing overall programming time ...

Page 51

... NXP Semiconductors In addition, IAP operations can be accomplished through the use of four SFRs consisting of a control/status register, a data register, and two address registers. Additional details may be found in the P89LPC933/934/935/936 User manual. 8.28.8 ISP ISP is performed without removing the microcontroller from the system. The ISP facility consists of a series of internal hardware resources coupled with internal firmware to facilitate remote programming of the P89LPC933/934/935/936 through the serial port ...

Page 52

... NXP Semiconductors 8.28.10 Hardware activation of the boot loader The boot loader can also be executed by forcing the device into ISP mode during a power-on sequence (see the P89LPC933/934/935/936 User manual for specific information). This has the same effect as having a non-zero status byte. This allows an application to be built that will normally execute user code but can be manually forced into ISP operation ...

Page 53

... NXP Semiconductors Start immediately. Edge triggered. Dual start immediately (P89LPC935/936). 8-bit conversion time of ≥3.9 μ A/D clock of 3.3 MHz. Interrupt or polled operation. Boundary limits interrupt. DAC output to a port pin with high output impedance. Clock divider. Power-down mode. 9.3 Block diagram Fig 23 ...

Page 54

... NXP Semiconductors 9.4.2 Fixed channel, continuous conversion mode A single input channel can be selected for continuous conversion. The results of the conversions will be sequentially placed in the four result registers. An interrupt, if enabled, will be generated after every four conversions. Additional conversion results will again cycle through the four result registers, overwriting the previous results. Continuous conversions continue until terminated by the user ...

Page 55

... NXP Semiconductors 9.5.3 Edge triggered An A/D conversion is started by rising or falling edge of P1.4. Once a conversion has started, additional edge triggers are ignored until the conversion has completed. The edge triggered start mode is available in all A/D operating modes. 9.5.4 Dual start immediately (P89LPC935/936) Programming this mode starts a synchronized conversion of both A/D converters ...

Page 56

... NXP Semiconductors 10. Limiting values Table 10. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter T bias ambient temperature amb(bias) T storage temperature stg I HIGH-level output current per OH(I/O) input/output pin I LOW-level output current per OL(I/O) input/output pin I maximum total input/output current ...

Page 57

... NXP Semiconductors 11. Static characteristics Table 11. Static characteristics 3.6 V unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb Symbol Parameter I operating supply current DD(oper) I Idle mode supply current DD(idle) I Power-down mode supply ...

Page 58

... NXP Semiconductors Table 11. Static characteristics 3.6 V unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb Symbol Parameter I LOW-level input current IL I input leakage current LI I HIGH-LOW transition current THL R internal pull-up resistance on ...

Page 59

... NXP Semiconductors 11 function ° 3.6 V; push-pull mode amb DD Fig 24 function P89LPC933_934_935_936 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core OH 002aab098 (typical values) OH All information provided in this document is subject to legal disclaimers. Rev. 8 — 12 January 2011 P89LPC933/934/935/936 ° 2.6 V; push-pull mode ...

Page 60

... NXP Semiconductors 12. Dynamic characteristics Table 12. Dynamic characteristics (12 MHz 2 3.6 V unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb Symbol Parameter f internal RC oscillator frequency osc(RC) f internal watchdog oscillator osc(WD) frequency f oscillator frequency ...

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... NXP Semiconductors Table 12. Dynamic characteristics (12 MHz 2 3.6 V unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb Symbol Parameter t SPI enable lag time SPILAG slave t SPICLK HIGH time SPICLKH master slave t SPICLK LOW time ...

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... NXP Semiconductors Table 13. Dynamic characteristics (18 MHz 3 3.6 V unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb Symbol Parameter f internal RC oscillator frequency osc(RC) f internal watchdog oscillator osc(WD) frequency f oscillator frequency osc T clock cycle ...

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... NXP Semiconductors Table 13. Dynamic characteristics (18 MHz 3 3.6 V unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb Symbol Parameter t SPICLK HIGH time SPICLKH master slave t SPICLK LOW time SPICLKL master slave t SPI data set-up time ...

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... NXP Semiconductors 12.1 Waveforms clock t QVXH output data write to SBUF t XHDV input data clear RI Fig 25. Shift register mode timing SS SPICLK (CPOL = 0) (output) SPICLK (CPOL = 1) (output) MISO (input) t MOSI SPIF (output) Fig 26. SPI master timing (CPHA = 0) Fig 27. External clock timing (with an amplitude of at least V ...

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... NXP Semiconductors SS SPICLK (CPOL = 0) (output) SPICLK (CPOL = 1) (output) MISO (input) t SPIF MOSI (output) Fig 28. SPI master timing (CPHA = SPIF t SPILEAD SPICLK (CPOL = 0) (input) t SPICLK (CPOL = 1) (input) t SPIA MISO (output) t SPIDSU MOSI (input) Fig 29. SPI slave timing (CPHA = 0) P89LPC933_934_935_936 Product data sheet ...

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... NXP Semiconductors SS t SPIF t SPILEAD SPICLK (CPOL = 0) (input) t SPIF SPICLK (CPOL = 1) (input) t SPIOH t SPIDV t SPIA MISO not defined (output) MOSI (input) Fig 30. SPI slave timing (CPHA = 1) 12.2 ISP entry mode Table 14. Dynamic characteristics, ISP entry mode 3.6 V, unless otherwise specified. ...

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... NXP Semiconductors 13. Other characteristics 13.1 Comparator electrical characteristics Table 15. Comparator electrical characteristics 3.6 V, unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb Symbol Parameter V input offset voltage IO V common-mode input voltage ...

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... NXP Semiconductors 13.2 ADC electrical characteristics Table 16. ADC electrical characteristics 3.6 V, unless otherwise specified −40 °C to +85 °C for industrial, −40 °C to +125 °C for extended, unless otherwise specified. T amb All limits valid for an external source impedance of less than 10 kΩ. ...

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... NXP Semiconductors 14. Package outline PLCC28: plastic leaded chip carrier; 28 leads pin 1 index 4 β DIMENSIONS (mm dimensions are derived from the original inch dimensions UNIT min. max. 4.57 0.53 mm 0.51 0.25 3.05 4.19 0.33 0.180 0.021 inches 0.02 0.01 0.12 0.165 0.013 Note 1 ...

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... NXP Semiconductors TSSOP28: plastic thin shrink small outline package; 28 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

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... NXP Semiconductors HVQFN28: plastic thermal enhanced very thin quad flat package; no leads; 28 terminals; body 0.85 mm terminal 1 index area terminal 1 28 index area DIMENSIONS (mm are the original dimensions) (1) A UNIT max. 0.05 0.35 mm 0.2 1 0.00 0.25 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. ...

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... NXP Semiconductors 15. Abbreviations Table 17. Acronym A/D CPU DAC EPROM EEPROM EMI LED PWM RAM RC RTC SAR SFR SPI UART P89LPC933_934_935_936 Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core Acronym list Description Analog to Digital Central Processing Unit Digital to Analog Converter ...

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... NXP Semiconductors 16. Revision history Table 18. Revision history Document ID P89LPC933_934_ 935_936 v.8 Modifications: P89LPC933_934_ 935_936 v.7 P89LPC933_934_ 935_936 v.6 P89LPC933_934_ 935_936 v.5 P89LPC933_934_ 935 v.4 P89LPC933_934_935_936 Product data sheet 8-bit microcontroller with accelerated two-clock 80C51 core Release Data sheet status date 20110112 Product data sheet • ...

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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

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... Product data sheet P89LPC933/934/935/936 8-bit microcontroller with accelerated two-clock 80C51 core own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ ...

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... NXP Semiconductors 19. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 2.1 Principal features . . . . . . . . . . . . . . . . . . . . . . . 1 2.2 Additional features . . . . . . . . . . . . . . . . . . . . . . 2 3 Product comparison overview . . . . . . . . . . . . . 3 4 Ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 Ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7 7 Logic symbols . . . . . . . . . . . . . . . . . . . . . . . . . 11 8 Functional description . . . . . . . . . . . . . . . . . . 12 8 ...

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... NXP Semiconductors 8.28.1 General description . . . . . . . . . . . . . . . . . . . . 49 8.28.2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 8.28.3 Flash organization . . . . . . . . . . . . . . . . . . . . . 50 8.28.4 Using flash as data storage . . . . . . . . . . . . . . 50 8.28.5 Flash programming and erasing . . . . . . . . . . . 50 8.28.6 In-circuit programming . . . . . . . . . . . . . . . . . . 50 8.28.7 In-application programming . . . . . . . . . . . . . . 50 8.28.8 ISP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51 8.28.9 Power-on reset code execution . . . . . . . . . . . 51 8.28.10 Hardware activation of the boot loader . . . . . . 52 8.29 User configuration bytes . . . . . . . . . . . . . . . . . 52 8 ...

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