LPC2420FBD208,551 NXP Semiconductors, LPC2420FBD208,551 Datasheet - Page 75

• Manufacturer Part Number: LPC2420FBD208,551
• Description: IC ARM7 MCU ROMLESS 208LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2420FBD208,551

• Program Memory Type: ROMless
• Package / Case: 208-LQFP
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: EBI/EMI, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 82K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 82 KB
• Interface Type: CAN/I2C/I2S/SPI/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4527; 935286745551

NXP Semiconductors
16. Revision history
Table 15.
LPC2420_60_5
Preliminary data sheet
Document ID
LPC2420_60_5
Modifications:
LPC2420_60_4
Modifications:
LPC2420_60_3
LPC2460_2
LPC2460_1
Revision history
Release date
20100224
20091015
20081120
20080201
20080123
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Table
Table
Added
Added LPC2420FET208.
Added Deep power-down mode information.
Table 6: Changed ESD min/max to −2500/+2500.
Table 7: Updated conditions and typical values for I
Table 7: Updated Table note 13.
Table 7: Updated min, typical and max values for oscillator pins.
Added Section 13.2 “XTAL1 input”.
Added Section 13.3 “XTAL and RTC Printed Circuit Board (PCB) layout guidelines”.
Figure 21: Changed ISP1301 to ISP1302.
Figure 22: Changed ISP1301 to ISP1302.
Section 7.25.3 “Brownout detection”: Changed V
7: Merged power-down mode information into one table.
7: Changed typical values from 19 to 20 for I
Table 13 “DAC electrical
Data sheet status
Preliminary data sheet
Preliminary data sheet
Preliminary data sheet
Preliminary data sheet
Preliminary data sheet
Rev. 05 — 24 February 2010
characteristics”.
Change notice
-
-
-
-
-
Flashless 16-bit/32-bit microcontroller
DD(3V3)
DD(DCDC)dpd(3V3)
DD(DCDC)act(3V3)
to V
LPC2420/2460
DD(DCDC)(3V3)
Supersedes
LPC2420_60_4
LPC2420_60_3
LPC2460_2
LPC2460_1
-
, I
.
BATact
© NXP B.V. 2010. All rights reserved.
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, and I
BAT
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