LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 39

IC ARM CORTEX MCU 512K 80-LQFP

LPC1759FBD80,551

Manufacturer Part Number
LPC1759FBD80,551
Description
IC ARM CORTEX MCU 512K 80-LQFP
Manufacturer
NXP Semiconductors
Series
LPC17xxr

Specifications of LPC1759FBD80,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
80-LQFP
Core Processor
ARM® Cortex-M3™
Core Size
32-Bit
Speed
120MHz
Connectivity
CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
Number Of I /o
52
Ram Size
64K x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 3.6 V
Data Converters
A/D 6x12b, D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC17
Core
ARM Cortex M3
Data Bus Width
32 bit
Data Ram Size
64 KB
Interface Type
Ethernet, USB, OTG, CAN
Maximum Clock Frequency
120 MHz
Number Of Programmable I/os
52
Number Of Timers
4
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 6 Channel
On-chip Dac
10 bit
Package
80LQFP
Device Core
ARM Cortex M3
Family Name
LPC17xx
Maximum Speed
120 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4968
935290523551

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NXP Semiconductors
10. Static characteristics
Table 6.
T
LPC1759_58_56_54_52_51
Product data sheet
Symbol
Supply pins
V
V
V
V
V
I
I
I
DD(REG)(3V3)
BAT
DD(IO)
amb
DD(3V3)
DD(REG)(3V3)
DDA
i(VBAT)
i(VREFP)
=
40
°
Static characteristics
C to +85
Parameter
supply voltage (3.3 V)
regulator supply voltage
(3.3 V)
analog 3.3 V pad supply
voltage
input voltage on pin
VBAT
input voltage on pin
VREFP
regulator supply current
(3.3 V)
battery supply current
I/O supply current
°
C, unless otherwise specified.
All information provided in this document is subject to legal disclaimers.
Conditions
external rail
active mode; code
executed from flash; all
peripherals disabled;
PCLK =
Sleep mode
Deep sleep mode
Power-down mode
Deep power-down mode;
RTC running
Deep power-down mode;
RTC running
Deep sleep mode
Power-down mode
Deep power-down mode
CCLK = 12 MHz; PLL
disabled
CCLK = 100 MHz; PLL
enabled
CCLK = 100 MHz; PLL
enabled (LPC1759)
CCLK = 120 MHz; PLL
enabled (LPC1759)
V
V
present
DD(REG)(3V3)
DD(REG)(3V3)
while(1){}
Rev. 6.01 — 11 March 2011
CCLK
8
present
not
LPC1759/58/56/54/52/51
[4][5]
[4][5]
[4][6]
[4][6]
[4][7]
[4][8]
[4][8]
[10]
[12]
[12]
[12]
[11]
[2]
[3]
[9]
32-bit ARM Cortex-M3 microcontroller
Min
2.4
2.4
2.7
2.1
2.7
-
-
-
-
-
-
-
-
-
-
-
-
Typ
3.3
3.3
3.3
3.3
3.3
7
42
50
67
2
240
31
630
530
1.1
40
40
10
[1]
© NXP B.V. 2011. All rights reserved.
Max
3.6
3.6
3.6
3.6
V
-
-
-
-
-
-
-
-
-
-
-
-
DDA
39 of 74
Unit
V
V
V
V
V
mA
mA
mA
mA
μA
μA
nA
nA
μA
nA
nA
nA

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