LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 107
LPC2468FET208,551
Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2468FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S
935283234551
LPC2468FET208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2468FET208,551
Manufacturer:
NXP
Quantity:
6 174
Company:
Part Number:
LPC2468FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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8. MAM usage notes
UM10237_4
User manual
Fig 21. Block diagram of the Memory Accelerator Module
ADDR
[18:4]
EQPREF
MUX
=
ADDR
LA[3:2]
ENAL0
cclk
INCREMENTOR
ENP
When changing MAM timing, the MAM must first be turned off by writing a zero to
MAMCR. A new value may then be written to MAMTIM. Finally, the MAM may be turned
on again by writing a value (1 or 2) corresponding to the desired operating mode to
MAMCR.
For a system clock slower than 20 MHz, MAMTIM can be 001. For a system clock
between 20 MHz and 40 MHz, flash access time is suggested to be 2 CCLKs, while in
systems with a system clock faster than 40 MHz, 3 CCLKs are proposed. For system
clocks of 60 MHz and above, 4CCLK’s are needed.
D
EN
EQA0
PREFETCH LATCH
=
PREFETCH MUX
Q
128
32
xFFE0
0FFF0
30000
20000
10000
00020
00010
00000
Rev. 04 — 26 August 2009
EQBT
=
xFFE4
0FFF4
30004
20004
10004
00024
00014
00004
ADDR
Chapter 6: LPC24XX Memory Accelerator Module (MAM)
128
xFFE8
0FFF8
30008
20008
10008
00028
00018
00008
ENBT
DI[31:0] (to ARM core)
FINAL MUX
BT LATCH
xFFEC
3000C
2000C
1000C
0FFFC
0002C
0001C
0000C
128
BT MUX
32
EQD
=
ADDR
UM10237
END
© NXP B.V. 2009. All rights reserved.
DATA LATCH
DATA MUX
128
32
107 of 792
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