LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 140

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
Table 122. LPC2420/60/68 pin description
UM10237_4
User manual
Symbol
P0[0] to P0[31]
P0[0]/RD1/
TXD3/SDA1
P0[1]/TD1/RXD3/
SCL1
P0[2]/TXD0
P0[3]/RXD0
P0[4]/
I2SRX_CLK/
RD2/CAP2[0]
P0[5]/
I2SRX_WS/
TD2/CAP2[1]
P0[6]/
I2SRX_SDA/
SSEL1/MAT2[0]
P0[7]/
I2STX_CLK/
SCK1/MAT2[1]
P0[8]/
I2STX_WS/
MISO1/MAT2[2]
Pin
94
96
202
204
168
166
164
162
160
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
Ball
U15
T14
C4
D6
B12
C12
D13
C13
A15
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
[1]
Type
I/O
I/O
I
O
I/O
I/O
O
I
I/O
I/O
O
I/O
I
I/O
I/O
I
I
I/O
I/O
O
I
I/O
I/O
I/O
O
I/O
I/O
I/O
O
I/O
I/O
I/O
O
Rev. 04 — 26 August 2009
Description
Port 0: Port 0 is a 32-bit I/O port with individual direction controls for each
bit. The operation of port 0 pins depends upon the pin function selected
via the Pin Connect block.
P0[0] — General purpose digital input/output pin.
RD1 — CAN1 receiver input (LPC2460 only).
TXD3 — Transmitter output for UART3.
SDA1 — I
P0[1] — General purpose digital input/output pin.
TD1 — CAN1 transmitter output (LPC2460 only).
RXD3 — Receiver input for UART3.
SCL1 — I
P0[2] — General purpose digital input/output pin.
TXD0 — Transmitter output for UART0.
P0[3] — General purpose digital input/output pin.
RXD0 — Receiver input for UART0.
P0[4] — General purpose digital input/output pin.
I2SRX_CLK — Receive Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the I
RD2 — CAN2 receiver input (LPC2460 only).
CAP2[0] — Capture input for Timer 2, channel 0.
P0[5] — General purpose digital input/output pin.
I2SRX_WS — Receive Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
specification.
TD2 — CAN2 transmitter output (LPC2460 only).
CAP2[1] — Capture input for Timer 2, channel 1.
P0[6] — General purpose digital input/output pin.
I2SRX_SDA — Receive data. It is driven by the transmitter and read by
the receiver. Corresponds to the signal SD in the I
SSEL1 — Slave Select for SSP1.
MAT2[0] — Match output for Timer 2, channel 0.
P0[7] — General purpose digital input/output pin.
I2STX_CLK — Transmit Clock. It is driven by the master and received by
the slave. Corresponds to the signal SCK in the I
SCK1 — Serial Clock for SSP1.
MAT2[1] — Match output for Timer 2, channel 1.
P0[8] — General purpose digital input/output pin.
I2STX_WS — Transmit Word Select. It is driven by the master and
received by the slave. Corresponds to the signal WS in the I
specification.
MISO1 — Master In Slave Out for SSP1.
MAT2[2] — Match output for Timer 2, channel 2.
2
2
C1 clock input/output (this is not an open-drain pin).
C1 data input/output (this is not an open-drain pin).
Chapter 8: LPC24XX Pin configuration
2
2
S-bus specification.
S-bus specification.
2
S-bus specification.
UM10237
© NXP B.V. 2009. All rights reserved.
2
2
S-bus
S-bus
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