LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 197

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
Table 158. Summary of GPIO registers (legacy APB accessible registers)
[1]
UM10237_4
User manual
Generic
Name
IOPIN
IOSET
IODIR
IOCLR
Reset value reflects the data stored in used bits only. It does not include reserved bits content.
Description
GPIO Port Pin value register. The current state of the GPIO
configured port pins can always be read from this register,
regardless of pin direction. By writing to this register port’s pins will
be set to the desired level instantaneously.
GPIO Port Output Set register. This register controls the state of
output pins in conjunction with the IOCLR register. Writing ones
produces highs at the corresponding port pins. Writing zeroes has
no effect.
GPIO Port Direction control register. This register individually
controls the direction of each port pin.
GPIO Port Output Clear register. This register controls the state of
output pins. Writing ones produces lows at the corresponding port
pins and clears the corresponding bits in the IOSET register.
Writing zeroes has no effect.
Rev. 04 — 26 August 2009
Chapter 10: LPC24XX General Purpose Input/Output (GPIO)
Access Reset
R/W
R/W
R/W
WO
value
NA
0x0
0x0
0x0
[1]
PORTn Register
Address & Name
IO0PIN - 0xE002 8000
IO1PIN - 0xE002 8010
IO0SET - 0xE002 8004
IO1SET - 0xE002 8014
IO0DIR - 0xE002 8008
IO1DIR - 0xE002 8018
IO0CLR - 0xE002 800C
IO1CLR - 0xE002 801C
UM10237
© NXP B.V. 2009. All rights reserved.
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