LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 275

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
9.18 Huge frames and frame length checking
9.19 Statistics counters
9.20 MAC status vectors
If EPADEN is 1, then small frames will be padded and a CRC will always be added to the
padded frames. In this case if ADPEN and VLPEN are both 0, then the frames will be
padded to 60 bytes and a CRC will be added creating 64 bytes frames; if VLPEN is 1, the
frames will be padded to 64 bytes and a CRC will be added creating 68 bytes frames; if
ADPEN is 1, while VLPEN is 0 VLAN frames will be padded to 64 bytes, non VLAN
frames will be padded to 60 bytes, and a CRC will be added to padded frames, creating
64 or 68 bytes padded frames.
If CRC generation is enabled, CRC generation can be delayed by four bytes by setting the
DELAYED CRC bit in the MAC2 register, in order to skip proprietary header information.
The ‘HUGE FRAME ENABLE’ bit in the MAC2 configuration register can be set to 1 to
enable transmission and reception of frames of any length. Huge frame transmission can
be enabled on a per frame basis by setting the Override and Huge bits in the transmit
descriptor Control word.
When enabling huge frames, the Ethernet block will not check frame lengths and report
frame length errors (RangeError and LengthError). If huge frames are enabled, the
received byte count in the RSV register may be invalid because the frame may exceed the
maximum size; the RxSize fields from the receive status arrays will be valid.
Frame lengths are checked by comparing the length/type field of the frame to the actual
number of bytes in the frame. A LengthError is reported by setting the corresponding bit in
the receive StatusInfo word.
The MAXF register allows the device driver to specify the maximum number of bytes in a
frame. The Ethernet block will compare the actual receive frame to the MAXF value and
report a RangeError in the receive StatusInfo word if the frame is larger.
Generally, Ethernet applications maintain many counters that track Ethernet traffic
statistics. There are a number of standards specifying such counters, such as IEEE std
802.3 / clause 30. Other standards are RFC 2665 and RFC 2233.
The approach taken here is that by default all counters are implemented in software. With
the help of the StatusInfo field in frame statuses, many of the important statistics events
listed in the standards can be counted by software.
Transmit and receive status information as detected by the MAC are available in registers
TSV0, TSV1 and RSV so that software can poll them. These registers are normally of
limited use because the communication between driver software and the Ethernet block
takes place primarily through frame descriptors. Statistical events can be counted by
software in the device driver. However, for debug purposes the transmit and receive status
vectors are made visible. They are valid as long as the internal status of the MAC is valid
and should typically only be read when the transmit and receive processes are halted.
Rev. 04 — 26 August 2009
Chapter 11: LPC24XX Ethernet
UM10237
© NXP B.V. 2009. All rights reserved.
275 of 792