LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 286
LPC2468FET208,551
Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2468FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S
935283234551
LPC2468FET208-S
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Part Number:
LPC2468FET208,551
Manufacturer:
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Quantity:
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LPC2468FET208,551
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6. LCD controller functional description
UM10237_4
User manual
Table 245. Pins used for TFT displays
The LCD controller performs translation of pixel-coded data into the required formats and
timings to drive a variety of single or dual panel monochrome and color LCDs.
Packets of pixel coded data are fed using the AHB interface, to two independent,
programmable, 32-bit wide, DMA FIFOs that act as input data flow buffers.
The buffered pixel coded data is then unpacked using a pixel serializer.
Depending on the LCD type and mode, the unpacked data can represent:
In the case of STN displays, either a value obtained from the addressed palette location,
or the true value is passed to the gray scaling generators. The hardware-coded gray scale
algorithm logic sequences the activity of the addressed pixels over a programmed number
of frames to provide the effective display appearance.
For TFT displays, either an addressed palette value or true color value is passed directly
to the output display drivers, bypassing the gray scaling algorithmic logic.
In addition to data formatting, the LCD controller provides a set of programmable display
control signals, including:
The LCD controller generates individual interrupts for:
Pin name
LCDVD[9:8]
LCDVD[10]
LCDVD[11]
LCDVD[15:12]
LCDVD[17:16]
LCDVD[18]
LCDVD[19]
LCDVD[23:20]
•
•
•
•
•
•
•
•
•
An actual true display gray or color value.
An address to a 256x16 bit wide palette RAM gray or color value.
LCD panel power enable.
Pixel clock.
Horizontal and vertical synchronization pulses.
Display bias.
Upper or lower panel DMA FIFO underflow.
Base address update signification.
Vertical compare.
12-bit, 4:4:4
GREEN[3:0]
BLUE[3:0]
Rev. 04 — 26 August 2009
(18 pins)
mode
-
-
-
-
-
-
16-bit, 5:6:5
GREEN[5:2]
GREEN[0]
GREEN[1]
BLUE[4:1]
(22 pins)
BLUE[0]
mode
-
-
-
Chapter 12: LPC24XX LCD controller
16-bit, 1:5:5:5
GREEN[4:1]
GREEN[0]
BLUE[4:1]
(24 pins)
BLUE[0]
Intensity
Intensity
mode
-
-
UM10237
© NXP B.V. 2009. All rights reserved.
GREEN[1:0]
GREEN[7:4]
GREEN[2]
GREEN[3]
BLUE[1:0]
BLUE[7:4]
(30 pins)
BLUE[2]
BLUE[3]
24-bit
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