LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 318

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
7.17 Cursor Control register (CRSR_CTRL, RW - 0xFFE1 0C00)
7.18 Cursor Configuration register (CRSR_CFG, RW - 0xFFE1 0C04)
Table 275. Cursor Image registers (CRSR_IMG, RW - 0xFFE1 0800 to 0xFFE1 0BFC)
The CRSR_CTRL register provides access to frequently used cursor functions, such as
the display on/off control for the cursor, and the cursor number.
If a 32x32 cursor is selected, one of four 32x32 cursors can be enabled. The images each
occupy one quarter of the image memory, with Cursor0 from location 0, followed by
Cursor1 from address 0x100, Cursor2 from 0x200 and Cursor3 from 0x300. If a 64x64
cursor is selected only one cursor fits in the image buffer, and no selection is possible.
Similar frame synchronization rules apply to the cursor number as apply to the cursor
coordinates. If CrsrFramesync is 1, the displayed cursor image is only changed during the
vertical frame blanking period. If CrsrFrameSync is 0, the cursor image index is changed
immediately, even if the cursor is currently being scanned.
The contents of the CRSR_CTRL register are described in
Table 276. Cursor Control register (CRSR_CTRL, RW - 0xFFE1 0C00)
The CRSR_CFG register provides overall configuration information for the hardware
cursor.
The contents of the CRSR_CFG register are described in
Bits
31:0
Bits
31:6
5:4
3:1
0
Function
CRSR_IMG
Function
reserved
CrsrNum[1:0]
reserved
CrsrOn
Rev. 04 — 26 August 2009
Description
Cursor Image data.
The 256 words of the cursor image registers define the
appearance of either one 64x64 cursor, or 4 32x32 cursors.
Description
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Cursor image number.
If the selected cursor size is 6x64, this field has no effect. If the
selected cursor size is 32x32:
00 = Cursor0.
01 = Cursor1.
10 = Cursor2.
11 = Cursor3.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Cursor enable.
0 = Cursor is not displayed.
1 = Cursor is displayed.
Chapter 12: LPC24XX LCD controller
Table
Table
12–277.
12–276.
UM10237
© NXP B.V. 2009. All rights reserved.
318 of 792
Reset
value
0x0
Reset
value
0x0
0x0
0x0
0x0