LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 336

IC ARM7 MCU FLASH 512K 208TFBGA

LPC2468FET208,551

Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Datasheets

Specifications of LPC2468FET208,551

Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S

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LPC2468FET208,551
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9. Register description
Table 293. Summary of USB device registers
UM10237_4
User manual
Name
Port select register
USBPortSel
Clock control registers
USBClkCtrl
USBClkSt
Device interrupt registers
USBIntSt
USBDevIntSt
USBDevIntEn
USBDevIntClr
USBDevIntSet
USBDevIntPri
Endpoint interrupt registers
USBEpIntSt
USBEpIntEn
USBEpIntClr
USBEpIntSet
USBEpIntPri
Endpoint realization registers
USBReEp
[2]
8.4 Remote wake-up
After entering the suspend state with DEV_CLK_EN and AHB_CLK_EN cleared, the
DEV_CLK_ON and AHB_CLK_ON will be cleared when the corresponding clock turns off.
When both bits are zero, USB_NEED_CLK will be low, indicating that the chip can be put
into Power-down mode by writing to the PCON register. The status of USB_NEED_CLK
can be read from the USBIntSt register.
Any bus activity in the suspend state will cause the USB_NEED_CLK signal to be
asserted. When the USB is configured to be a wakeup source from power-down
(USBWAKE bit set in the INTWAKE register), the assertion of USB_NEED_CLK causes
the chip to wake up from Power-down mode.
The USB device controller supports software initiated remote wake-up. Remote wake-up
involves resume signaling on the USB bus initiated from the device. This is done by
clearing the SUS bit in the SIE Set Device Status register. Before writing into the register,
all the clocks to the device controller have to be enabled using the USBClkCtrl register.
Table 13–293
The Serial Interface Engine (SIE) has other registers that are indirectly accessible via the
SIE command registers. See
description”
Description
USB Port Select
USB Clock Control
USB Clock Status
USB Interrupt Status
USB Device Interrupt Status
USB Device Interrupt Enable
USB Device Interrupt Clear
USB Device Interrupt Set
USB Device Interrupt Priority
USB Endpoint Interrupt Status
USB Endpoint Interrupt Enable
USB Endpoint Interrupt Clear
USB Endpoint Interrupt Set
USB Endpoint Priority
USB Realize Endpoint
for more info.
shows the USB Device Controller registers directly accessible by the CPU.
Rev. 04 — 26 August 2009
Section 13–11 “Serial interface engine command
Chapter 13: LPC24XX USB device controller
R/W
R/W
RO
RO
R/W
WO
WO
WO
R/W
Access
R/W
RO
R/W
WO
WO
WO
[3]
Reset value
0x0000 0000
0x0000 0000
0x0000 0000
0x8000 0000
0x0000 0010
0x0000 0000
0x0000 0000
0x0000 0000
0x00
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0000
0x0000 0003
[1]
UM10237
© NXP B.V. 2009. All rights reserved.
0xFFE0 C20C
Address
0xFFE0 C110
0xFFE0 CFF4
0xFFE0 CFF8
0xE01F C1C0
0xFFE0 C200
0xFFE0 C204
0xFFE0 C208
0xFFE0 C22C
0xFFE0 C230
0xFFE0 C234
0xFFE0 C238
0xFFE0 C23C
0xFFE0 C240
0xFFE0 C244
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