LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 348

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
Table 317. USB Realize Endpoint register (USBReEp - address 0xFFE0 C244) bit allocation
Reset value: 0x0000 0003
Table 318. USB Realize Endpoint register (USBReEp - address 0xFFE0 C244) bit description
UM10237_4
User manual
Bit
0
1
31:2
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Symbol
EP0
EP1
EPxx
9.5.2 USB Realize Endpoint register (USBReEp - 0xFFE0 C244)
EP31
EP23
EP15
EP7
31
23
15
7
Value
0
1
0
1
0
1
Since all the realized endpoints occupy EP_RAM space, the total EP_RAM requirement is
where N is the number of realized endpoints. Total EP_RAM space should not exceed
4096 bytes (4 kB, 1 kwords).
Writing one to a bit in this register causes the corresponding endpoint to be realized.
Writing zeros causes it to be unrealized. This register returns to its reset state when a bus
reset occurs. USBReEp is a read/write register.
On reset, only the control endpoints are realized. Other endpoints, if required, are realized
by programming the corresponding bits in USBReEp. To calculate the required EP_RAM
space for the realized endpoints, see
Realization of endpoints is a multi-cycle operation. Pseudo code for endpoint realization is
shown below.
Clear EP_RLZED bit in USBDevIntSt;
for every endpoint to be realized,
{
/* OR with the existing value of the Realize Endpoint register */
EP30
EP22
EP14
EP6
30
22
14
6
Control endpoint EP0 is not realized.
Control endpoint EP0 is realized.
Control endpoint EP1 is not realized.
Control endpoint EP1 is realized.
Endpoint EPxx is not realized.
Endpoint EPxx is realized.
Description
EP29
EP21
EP13
EP5
29
21
13
5
TotalEPRAMspace
Rev. 04 — 26 August 2009
EP28
EP20
EP12
EP4
28
20
12
4
Section
=
Chapter 13: LPC24XX USB device controller
32
EP27
EP19
EP11
EP3
27
19
11
3
13–9.5.1.
+
n
∑
N
=
0
EPRAMspace n ( )
EP26
EP18
EP10
EP2
26
18
10
2
EP25
EP17
EP9
EP1
25
17
UM10237
9
1
© NXP B.V. 2009. All rights reserved.
Reset value
1
1
0
EP24
EP16
348 of 792
EP8
EP0
24
16
8
0