LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 453

• Manufacturer Part Number: LPC2468FET208,551
• Description: IC ARM7 MCU FLASH 512K 208TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2400r

Specifications of LPC2468FET208,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 208-TFBGA
• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 72MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
• Number Of I /o: 160
• Ram Size: 98K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC24
• Core: ARM7TDMI-S
• Data Bus Width: 16 bit, 32 bit
• Data Ram Size: 98 KB
• Interface Type: CAN/I2S/ISP/SSP/UART/USB
• Maximum Clock Frequency: 72 MHz
• Number Of Programmable I/os: 160
• Number Of Timers: 6
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
• Development Tools By Supplier: OM10100
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8-ch x 10-bit
• On-chip Dac: 1-ch x 10-bit
• Package: 208TFBGA
• Device Core: ARM7TDMI-S
• Family Name: LPC2000
• Maximum Speed: 72 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4262; 935283234551; LPC2468FET208-S

NXP Semiconductors
UM10237_4
User manual
4.8 UART1 Modem Control Register (U1MCR - 0xE001 0010)
Table 405. UART1 Line Control Register (U1LCR - address 0xE001 000C) bit description
The U1MCR enables the modem loopback mode and controls the modem output signals.
Table 406. UART1 Modem Control Register (U1MCR - address 0xE001 0010) bit description
Bit
5:4
6
7
Bit
0
1
3-2
4
5
Symbol Value Description
Parity
Select
Break
Control
Divisor
Latch
Access
Bit
(DLAB)
-
Symbol
DTR
Control
RTS
Control
Loopback
Mode
Select
-
00
01
10
11
0
1
0
1
Value Description
NA
0
1
NA
Odd parity. Number of 1s in the transmitted character and the
attached parity bit will be odd.
Even Parity. Number of 1s in the transmitted character and the
attached parity bit will be even.
Forced "1" stick parity.
Forced "0" stick parity.
Disable break transmission.
Enable break transmission. Output pin UART1 TXD is forced to
logic 0 when U1LCR[6] is active high.
Disable access to Divisor Latches.
Enable access to Divisor Latches.
Rev. 04 — 26 August 2009
Source for modem output pin, DTR. This bit reads as 0 when
modem loopback mode is active.
Source for modem output pin RTS. This bit reads as 0 when
modem loopback mode is active.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
The modem loopback mode provides a mechanism to perform
diagnostic loopback testing. Serial data from the transmitter is
connected internally to serial input of the receiver. Input pin,
RXD1, has no effect on loopback and output pin, TXD1 is held in
marking state. The four modem inputs (CTS, DSR, RI and DCD)
are disconnected externally. Externally, the modem outputs (RTS,
DTR) are set inactive. Internally, the four modem outputs are
connected to the four modem inputs. As a result of these
connections, the upper four bits of the U1MSR will be driven by
the lower four bits of the U1MCR rather than the four modem
inputs in normal mode. This permits modem status interrupts to
be generated in loopback mode by writing the lower four bits of
U1MCR.
Disable modem loopback mode.
Enable modem loopback mode.
Reserved, user software should not write ones to reserved bits.
The value read from a reserved bit is not defined.
Chapter 17: LPC24XX UART1
UM10237
© NXP B.V. 2009. All rights reserved.
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Reset
Value
0
0
0
Reset
value
0
0
0
0
0