LPC2468FET208,551 NXP Semiconductors, LPC2468FET208,551 Datasheet - Page 523
LPC2468FET208,551
Manufacturer Part Number
LPC2468FET208,551
Description
IC ARM7 MCU FLASH 512K 208TFBGA
Manufacturer
NXP Semiconductors
Series
LPC2400r
Specifications of LPC2468FET208,551
Program Memory Type
FLASH
Program Memory Size
512KB (512K x 8)
Package / Case
208-TFBGA
Core Processor
ARM7
Core Size
16/32-Bit
Speed
72MHz
Connectivity
CAN, EBI/EMI, Ethernet, I²C, Microwire, MMC, SPI, SSI, SSP, UART/USART, USB OTG
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
160
Ram Size
98K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Processor Series
LPC24
Core
ARM7TDMI-S
Data Bus Width
16 bit, 32 bit
Data Ram Size
98 KB
Interface Type
CAN/I2S/ISP/SSP/UART/USB
Maximum Clock Frequency
72 MHz
Number Of Programmable I/os
160
Number Of Timers
6
Operating Supply Voltage
3.3 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2, IRD-LPC2468-DEV, SAB-TFBGA208, KSK-LPC2468-PL
Development Tools By Supplier
OM10100
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
On-chip Dac
1-ch x 10-bit
Package
208TFBGA
Device Core
ARM7TDMI-S
Family Name
LPC2000
Maximum Speed
72 MHz
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
622-1025 - KIT DEV IND REF DESIGN LPC2468622-1024 - BOARD SCKT ADAPTER FOR TFBGA208568-4358 - DISPLAY QVGA TFT FOR OM10100568-4309 - BOARD EXTENSION LPCSTICK568-4308 - EVAL LPC-STICK WITH LPC2468MCB2400U - BOARD EVAL MCB2400 + ULINK2MCB2400 - BOARD EVAL FOR NXP LPC246X SER622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-4262
935283234551
LPC2468FET208-S
935283234551
LPC2468FET208-S
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
LPC2468FET208,551
Manufacturer:
NXP
Quantity:
6 174
Company:
Part Number:
LPC2468FET208,551
Manufacturer:
NXP Semiconductors
Quantity:
10 000
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UM10237_4
User manual
FullCAN explicit standard frame format identfier section (11-bit CAN ID)
The start address of the FullCAN Explicit Standard Frame Format Identifier section is
(automatically) set to 0x00. The end of this section is defined in the SFF_sa register. In the
FullCAN ID section only identifiers of FullCAN Object are stored for acceptance filtering.
In this section two CAN Identifiers with their Source CAN Channels (SCC) share one
32-bit word. Not used or disabled CAN Identifiers can be marked by setting the message
disable bit. The FullCAN Object data for each defined identifier can be found in the
FullCAN Message Object section. In case of an identifier match during the acceptance
filter process, the received FullCAN message object data is moved from the Receive
Buffer of the appropriate CAN Controller into the FullCAN Message Object section. To
provide memory space for eight FullCAN, Explicit Standard Frame Format identifiers, the
SFF_sa register value is set to 0x10. The identifier with the Index 1 of this section is not
used and therefore disabled.
Explicit standard frame format identifier section (11-bit CAN ID)
The start address of the Explicit Standard Frame Format section is defined in the SFF_sa
register with the value of 0x10. The end of this section is defined in the End of Table
address register (ENDofTable). In the explicit Standard Frame Format section of the ID
Look-up Table two CAN Identifiers with their Source CAN Channel (SCC) share one 32-bit
word. Not used or disabled CAN Identifiers can be marked by setting the message disable
bit. To provide memory space for eight Explicit Standard Frame Format identifiers, the
ENDofTable register value is set to 0x20.
FullCAN message object data section
The start address of the FullCAN Message Object Data section is defined with the
ENDofTable register. The number of enabled FullCAN identifiers is limited to the available
memory space in the FullCAN Message Object Data section. Each defined FullCAN
Message needs three address lines for the Message Data in the FullCAN Message Object
Data section. The FullCAN Message Object section is organized in that way, that each
Index number of the FullCAN Identifier section corresponds to a Message Object Number
in the FullCAN Message Object section.
Rev. 04 — 26 August 2009
Chapter 18: LPC24XX CAN controllers CAN1/2
UM10237
© NXP B.V. 2009. All rights reserved.
523 of 792
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